Overlay Synopsys u-boot ARC changes over v2009.06
checked out u-boot v2009.06 as the base, then deleted all files.
Unpacked the Synopsys u-boot ARC package, moved all files out of
the packaging directory to create this change.
Synopsys u-boot ARC package is from this SourceForge link:
https://sourceforge.net/projects/arc-linux/files/U-Boot/uboot-2009.06.ARC1.4.gz
Change-Id: I241e57b0d98a2599f5610fee0fba1ba0b2914857
diff --git a/Makefile b/Makefile
index a23fbf6..538c07b 100644
--- a/Makefile
+++ b/Makefile
@@ -183,6 +183,9 @@
ifeq ($(ARCH),sparc)
CROSS_COMPILE = sparc-elf-
endif # sparc
+ifeq ($(ARCH),arc)
+CROSS_COMPILE = arc-elf32-
+endif
endif # HOSTARCH,ARCH
endif # CROSS_COMPILE
@@ -284,9 +287,8 @@
# The "tools" are needed early, so put this first
# Don't include stuff already done in $(LIBS)
-SUBDIRS = tools \
- examples \
- api_examples
+SUBDIRS = tools
+#examples api_examples
.PHONY : $(SUBDIRS)
@@ -306,7 +308,7 @@
#########################################################################
#########################################################################
-ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND)
+ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND) $(obj)u-boot.dis
ifeq ($(ARCH),blackfin)
ALL += $(obj)u-boot.ldr
endif
@@ -2592,6 +2594,20 @@
PCIPPC2_config \
PCIPPC6_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
+#========================================================================
+# ARC
+#========================================================================
+arcangel_arc700_ram_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arc arc700 arcangel
+arcangel_arc5_ram_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arc arc5 aa3 ram
+arcangel_arc700_flash_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arc arc700 aa3 flash
+arcangel_arc5_flash_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arc arc5 aa3 flash
+ml50x_arc600_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arc arc ml50x
+
ppmc7xx_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
diff --git a/README.ARC b/README.ARC
new file mode 100644
index 0000000..6753396
--- /dev/null
+++ b/README.ARC
@@ -0,0 +1,103 @@
+How to use ARC U-BOOT
+
+Configuring u-boot
+==================
+
+See the file include/configs/arcangel_arc700_ram.h
+
+Right near the top of the file you'll see an include of config_cmd_default
+this causes the build to include all the u-boot default commands.
+The following lines either add to or subtract from that configuration.
+
+
+
+Building u-boot
+================
+
+For a RAM based build :
+
+$ make arcangel_arc700_ram_config
+$ make
+
+The resulting u-boot ELF file can be loaded with a suitable debugger / loader
+
+To make a flash based image you'll need to edit the linker script and locate the image
+correctly for your memory layout.
+
+Look in board/arcangel/u-boot.lds for a working example.
+
+
+
+Booting large files.
+====================
+
+u-boot by default starts at TEXT_BASE specified in board/arcangel/config.mk
+which which is mapped to 0x80000000 + TEXT_BASE in the memory (in untranslated
+space). u-boot uses memory region from TEXT_BASE - CONFIG_SYS_MALLOC_LEN to
+TEXT_BASE for malloc.
+
+When an image is loaded (either via network or IDE), the address where the image
+is loaded is specified in the boot command and its elf header specifies the
+address where the image has to be copied to. You should make sure that their is
+no overlap of u-boot image with the memory where image it is loaded to and with
+the memory where it is copied to.
+
+By default TEXT_BASE is 0x3000000 and CONFIG_SYS_MALLOC_LEN is 0x8000. If
+0x4000000 is specified as load address and the image is copied to 0x80000000,
+then you will clobber the loader code if the image size is bigger than
+47.96875MB, which is TEXT_BASE - CONFIG_SYS_MALLOC_LEN.
+
+You have to modify TEXT_BASE in board/arcangel/config.mk to avoid the overlaps
+or to change uboot starting address.
+
+Network booting
+===============
+
+For TFTP boot the following has been tested.
+
+ArcAngel4 # tftpboot 0x4000000 vmlinux
+Using ARC EMAC device
+TFTP from server 172.16.18.73; our IP address is 172.16.18.98
+Filename 'vmlinux'.
+Load address: 0x4000000
+Loading: #################################################################
+ #################################################################
+ #################################################################
+ #####################
+done
+Bytes transferred = 3170437 (306085 hex)
+ArcAngel4 #
+ArcAngel4 # bootelf
+Loading .vector @ 0x80000000 (504 bytes)
+Loading .init @ 0x80002000 (73728 bytes)
+Loading .text @ 0x80014000 (2016384 bytes)
+Loading __ksymtab @ 0x80201000 (14408 bytes)
+Loading __ksymtab_gpl @ 0x80204848 (2808 bytes)
+Loading __ksymtab_strings @ 0x80205340 (38956 bytes)
+Loading __param @ 0x8020eb6c (400 bytes)
+Loading .data @ 0x80210000 (76728 bytes)
+Clearing .bss @ 0x80224000 (97576 bytes)
+copying linux command line into BSS: arcclk=65
+Loading .init.ramfs @ 0x8023c000 (133 bytes)
+## Starting application at 0x80002000 ...
+EMAC : RESET
+LXT970A : RESET
+Linux version 2.6.19-04142008 (simonrs@jasper) (gcc version 4.2.1 (ARC_2.0)) #3 PREEMPT Mon Jun 9 12:17:34 PDT 2008
+Parsing ATAG parameters
+
+etc.
+
+NFS Booting has also been tested.
+
+# ArcAngel4 # nfs 0x4000000 172.16.18.73:/shared/simons_aa4/simon/vmlinux
+
+ARC Angel 4 IDE Booting.
+========================
+
+Although highly dependent on ARC Angel 4 hardware the u-boot port also supports
+booting from an IDE disk. This will likely form the basis of your own loader should
+you wish to support booting from an IDE type disk (flash card etc)
+
+
+
+
diff --git a/arc_config.mk b/arc_config.mk
new file mode 100644
index 0000000..64e909f
--- /dev/null
+++ b/arc_config.mk
@@ -0,0 +1,3 @@
+# this switches are valid only for ml50x_arc600 target
+CONFIG_ARC_CPU_BUS_WIDTH=24
+CONFIG_ARC_BOARD_TIMER=1
diff --git a/board/arcangel/Makefile b/board/arcangel/Makefile
new file mode 100644
index 0000000..bb57a3e
--- /dev/null
+++ b/board/arcangel/Makefile
@@ -0,0 +1,40 @@
+#
+# Copyright Codito Technologies (www.codito.com)
+#
+# board/aa3/Makefile
+#
+# Copyright (C)
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License version 2 as
+# published by the Free Software Foundation.
+#
+# Authors : Sandeep Patil (sandeep.patil@codito.com)
+# Pradeep Sawlani (pradeep.sawlani@codito.com)
+#
+
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := aa3.o arc_emac.o serial.o ide.o arc_pgu.o
+SOBJS :=
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/arcangel/aa3.c b/board/arcangel/aa3.c
new file mode 100644
index 0000000..b474f01
--- /dev/null
+++ b/board/arcangel/aa3.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * board/aa3/aa3.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#include <asm/arcregs.h>
+
+#include <linux/types.h>
+#include <config.h>
+#include <asm/global_data.h> /* For global data structre */
+#include <asm/sys_ctrl.h>
+
+#define TIMER0_LIMIT 0xffffffff /* Maximum limit for timer */
+
+static ulong timestamp;
+
+#ifdef CONFIG_ARC_SYS_CTRL_DEV
+static sys_ctrl_reg_t *sys_ctrl_dev = SYS_CTRL_DEVICE_ADDRESS;
+#endif
+
+/* Function to start timer from 'count' */
+
+void set_timer (ulong count)
+{
+ /* Set up the LIMIT0 , COUNT0 and CONTROL0 registers for timer 0 without interrupt */
+ write_new_aux_reg(ARC_REG_TIMER0_CTRL, 0);
+ write_new_aux_reg(ARC_REG_TIMER0_LIMIT, TIMER0_LIMIT);
+ write_new_aux_reg(ARC_REG_TIMER0_CTRL, 2);
+ write_new_aux_reg(ARC_REG_TIMER0_CNT, count);
+}
+
+/* Function to get the current count value */
+ulong get_timer (ulong base)
+{
+ /* Read the count value from COUNT0 */
+ timestamp = read_new_aux_reg(ARC_REG_TIMER0_CNT);
+ return timestamp - base;
+}
+
+void reset_timer(void)
+{
+ set_timer(0);
+}
+
+void uninit_timer(void)
+{
+ write_new_aux_reg(ARC_REG_TIMER0_LIMIT,0xffffff);
+ write_new_aux_reg(ARC_REG_TIMER0_CNT,0);
+ write_new_aux_reg(ARC_REG_TIMER0_CTRL,0);
+}
+
+/* Delay function */
+
+void udelay (unsigned long usec)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ ulong uTicks;
+ set_timer(0);
+ uTicks = (gd->cpu_clk/1000000) * usec;
+ /* Continue looping till the timer count is more thean the required delay */
+ while(get_timer(0) < uTicks);
+}
+
+void show_boot_progress (int status)
+{
+#ifdef CONFIG_ARC_SYS_CTRL_DEV
+ sys_ctrl_dev->leds = status;
+#endif
+}
+
+#ifdef CONFIG_ARC_SYS_CTRL_DEV
+static unsigned read_dip_switches(void)
+{
+ return sys_ctrl_dev->dip_switches;
+}
+
+static unsigned read_clk(void)
+{
+ int unsigned sw = read_dip_switches();
+ static unsigned clk_tbl[4] = { 95, 85, 75, 65};
+
+ sw >>= 2;
+ sw &= 0x3;
+ return 1000000 * clk_tbl[sw];
+}
+#else
+static unsigned read_clk(void)
+{
+ return CONFIG_ARC_CLK;
+}
+#endif
+
+void disable_rom(void)
+{
+#ifdef CONFIG_ARC_SYS_CTRL_DEV
+ sys_ctrl_dev->mem_cfg1 = 0;
+#endif
+}
+
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ disable_rom();
+
+ gd->cpu_clk = read_clk();
+ reset_timer(); /* Intialise the timer */
+
+ gd->bd->bi_boot_params = TEXT_BASE - CONFIG_SYS_MALLOC_LEN + CONFIG_SYS_ENV_SIZE; /* address of kernel parameters */
+
+ return 0;
+}
diff --git a/board/arcangel/arc_emac.c b/board/arcangel/arc_emac.c
new file mode 100644
index 0000000..f1cb19d
--- /dev/null
+++ b/board/arcangel/arc_emac.c
@@ -0,0 +1,335 @@
+/*
+ * Copyright Synopsys 2011-2012
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ * -Initial Version
+ *
+ * Vineet Gupta (vgupta@synopsys.com): May 2011
+ * -Fixed the networking flakiness (brain-dead Rx and Tx routines)
+ * -Rx fixes
+ * = No need to tinker with status regs (since no interrupts)
+ * = Instead of starting at BD 0, remember where a pkt is seen and in
+ * subseq Rx call, poll the next BD, where chance of seeing pkt
+ * is more likely. @rxbd_cntr used to track that
+ * = Entire D$ was flushed thrice for one pkt Rx, only needed once.
+ * -Tx fixes
+ * = again useless tinkering with status reg, no need to touch it at all
+ * = old code would write out to BD-x, wait for emac to pick it up
+ * and then free it up in same flow. Now, we write to BD-x and simply
+ * move to next BD, giving emac all the time. More imp it prevents the
+ * need to poll the BD and/or status-reg.
+ * = Added a loop to scan for a free BD, in case one pointed to by
+ * @txbd_cntr is in use by emac.
+ */
+
+
+
+//#include <cmd_confdefs.h> /* Command configs */
+#include <asm/u-boot.h> /* Board data structure */
+#include <asm/arc_emac.h> /* MDIO macros and ARC_EMAC register macros */
+#include <config.h> /* ARC700 clock freq. */
+#include <asm/errno.h>
+#include <malloc.h>
+#include <common.h>
+#include <net.h>
+#include <linux/types.h>
+
+//#define RX_DBG
+#ifdef RX_DBG
+#define RX_PRINT(x) do { x; } while(0)
+#else
+#define RX_PRINT(x)
+#endif
+
+/* rx buffer descriptor. We align descriptors to 32 so info and
+ * data lie on the same cache line. This also satisfies the 8 byte
+ * alignment required by the VMAC */
+volatile struct aa3_buffer_desc rxbd[RX_BDT_LEN] __attribute__((aligned(32)));
+
+/* tx buffer descriptor */
+volatile struct aa3_buffer_desc txbd[TX_BDT_LEN] __attribute__((aligned(32)));
+
+/* transmit buffer counter */
+static int txbd_cntr;
+static int rxbd_cntr;
+
+char default_addr[10] = { 0x00 ,0x01 ,0x02 ,0x03 ,0x04 ,0x05 };
+int arc_eth_rx (struct eth_device * net_current)
+{
+ unsigned int i,len, loop;
+ unsigned int cnt=0;
+ volatile unsigned char *recv_data;
+ volatile unsigned int *stat_reg,*reg_base_addr = VMAC_REG_BASEADDR;
+ stat_reg = reg_base_addr + STAT_OFFSET;
+
+ /* This is where pkt was found - last time */
+ i = rxbd_cntr;
+
+ for (loop=0 ; loop < RX_BDT_LEN;loop++) {
+
+ i = (i + 1) & (RX_BDT_LEN - 1); /* poll the next one */
+
+ if((rxbd[i].info & OWN_MASK) == 0) {
+
+ rxbd_cntr = i; /* remember that we saw a pkt here */
+ RX_PRINT(cnt++);
+
+ /* Ckh if this BD has a new pkt */
+ if( (rxbd[i].info & FRST_MASK) && (rxbd[i].info & LAST_MASK) ) {
+ recv_data = (volatile unsigned char *)rxbd[i].data;
+ len = rxbd[i].info & LEN_MASK;
+
+ if( !(rxbd[i].data = malloc(ETH_MTU + VMAC_BUFFER_PAD))) {
+ printf("Out of memory,dropping packet\n");
+ rxbd[i].info = OWN_MASK | (ETH_MTU + VMAC_BUFFER_PAD);
+ }
+ else {
+ rxbd[i].info = OWN_MASK | (ETH_MTU + VMAC_BUFFER_PAD);
+ flush_cache(1,2);
+ RX_PRINT(printf("emac: Rx @ BD %d\n", i));
+ NetReceive((uchar *)recv_data,len);
+ free((void *)recv_data);
+ }
+ }
+ else {
+ printf("Rx chained, Packet bigger than device MTU\n");
+ rxbd[i].info = OWN_MASK | (ETH_MTU + VMAC_BUFFER_PAD);
+ }
+
+ }
+ }
+
+ //RX_PRINT(if(!cnt) printf("emac: BD Ring empty [%d..%d]\n",rxbd_cntr,i));
+
+ return (0);
+}
+
+int arc_eth_send (struct eth_device *net_current, volatile void *packet, int length)
+{
+
+ volatile unsigned int *reg_base_addr = VMAC_REG_BASEADDR;
+ volatile unsigned int *stat_reg = reg_base_addr + STAT_OFFSET;
+ int cnt = 0;
+
+ if (length > ETH_MTU) {
+ printf("eth_send:packet length greater than MTU\n");
+ return -EMSGSIZE;
+ }
+ if ( length < 64 )
+ length = 64;
+
+ do {
+ if( (txbd[txbd_cntr].info & OWN_MASK) == 0) {
+ flush_cache(1,2);
+ txbd[txbd_cntr].data = (void *) packet;
+ txbd[txbd_cntr].info = OWN_MASK | length | FRST_MASK | LAST_MASK;
+
+ /* Force emac to poll BDs */
+ *stat_reg |= TXPL_MASK;
+ txbd_cntr = (txbd_cntr + 1) & (TX_BDT_LEN-1);
+ return 0;
+ }
+ else {
+ txbd_cntr = (txbd_cntr + 1) & (TX_BDT_LEN-1);
+ }
+ }
+ while (++cnt < TX_BDT_LEN);
+
+ printf("Out of Tx Buffers\n");
+ return -ENOMEM;
+}
+void arc_eth_halt(struct eth_device * net_current)
+{
+
+}
+
+void eth_stop(void)
+{
+ volatile unsigned int *reg_base_addr = VMAC_REG_BASEADDR;
+ volatile unsigned int *control_reg = reg_base_addr + CONTROL_OFFSET;
+ volatile unsigned int *macl = reg_base_addr + ADDRL_OFFSET;
+ volatile unsigned int *mach = reg_base_addr + ADDRH_OFFSET;
+ volatile unsigned int *reg;
+ volatile unsigned int *stat_reg;
+ unsigned int temp;
+
+ reg = reg_base_addr + ENABLE_OFFSET;
+ *reg = 0;
+
+ reg = reg_base_addr + STAT_OFFSET;
+ *reg = 0xffffffff;
+
+ txbd_cntr = 0;
+ (*control_reg) = (*control_reg) & (~EN_MASK) ; /* VMAC disabled */
+ *control_reg = 0;
+ *macl = 0;
+ *mach = 0;
+ stat_reg = reg_base_addr + STAT_OFFSET;
+ *stat_reg = 0;
+
+ printf("EMAC : RESET\n");
+ reg = reg_base_addr + MDIO_DATA_OFFSET;
+ stat_reg = reg_base_addr + STAT_OFFSET;
+
+ __mdio_write(stat_reg, reg, PHY_ID, LXT970A_CTRL_REG, LXT970A_CTRL_RESET);
+
+ do {
+ __mdio_read (stat_reg, reg, PHY_ID, LXT970A_CTRL_REG, temp);
+ } while (temp & LXT970A_CTRL_RESET);
+
+ printf("LXT970A : RESET\n");
+}
+
+void aa3_emac_set_address(void *ptr)
+{
+ char *mac_addr = (char *)ptr ;
+ volatile unsigned int *reg;
+ volatile unsigned int *reg_base_addr = VMAC_REG_BASEADDR;
+
+ reg = reg_base_addr + ADDRL_OFFSET;
+ *reg = *((unsigned int *)mac_addr);
+ reg = reg_base_addr + ADDRH_OFFSET;
+ (*reg) = (*(unsigned int *) (mac_addr+4)) & 0x0000ffff;
+}
+
+
+
+int arc_eth_init(bd_t *bd)
+{
+ volatile unsigned int *reg;
+ volatile unsigned int *stat_reg;
+ volatile unsigned int *reg_base_addr;
+ int i;
+ unsigned int temp,duplex ;
+ static int initialised = 0 ;
+ struct eth_device *dev;
+
+
+ reg_base_addr = (unsigned int *) (VMAC_REG_BASEADDR);
+ if(initialised) {
+ reg = reg_base_addr + CONTROL_OFFSET;
+ goto out;
+ }
+ reg = reg_base_addr + ENABLE_OFFSET;
+ (*reg) = 0; /* Disable all interrupts as we are not handling */
+
+ reg = reg_base_addr + MDIO_DATA_OFFSET;
+ stat_reg = reg_base_addr + STAT_OFFSET;
+
+ /* Reset the PHY */
+ __mdio_write(stat_reg, reg, PHY_ID, LXT970A_CTRL_REG, LXT970A_CTRL_RESET);
+
+ /* Wait till the PHY has finished resetting */
+ do {
+ __mdio_read (stat_reg, reg, PHY_ID, LXT970A_CTRL_REG, temp);
+ } while (temp & LXT970A_CTRL_RESET);
+
+
+
+ /* Advertize capabilities */
+ temp = LXT970A_AUTONEG_ADV_10BTX_FULL |
+ LXT970A_AUTONEG_ADV_10BT | AUTONEG_ADV_IEEE_8023;
+
+ /* If the system clock is greater than 25Mhz then advertize 100 */
+#if (CONFIG_ARC_CLK > 25000000)
+ temp = LXT970A_AUTONEG_ADV_100BTX_FULL | LXT970A_AUTONEG_ADV_100BTX;
+#endif
+ __mdio_write(stat_reg, reg, PHY_ID, LXT970A_AUTONEG_ADV_REG, temp);
+
+ /* Start Auto-Negotioation */
+ __mdio_write(stat_reg, reg, PHY_ID, LXT970A_CTRL_REG,
+ (LXT970A_CTRL_AUTONEG | LXT970A_CTRL_RESTART_AUTO));
+
+ /* Wait for Auto Negotiation to complete */
+ do {
+ __mdio_read(stat_reg, reg, PHY_ID, LXT970A_STATUS2_REG, temp);
+ } while (!(temp & LXT970A_STATUS2_COMPLETE));
+
+// Check polarity
+
+ if (temp & LXT970A_STATUS2_POLARITY)
+ {
+ printf("EMAC : LXT Polarity bit set\n");
+ temp = ~temp; // invert it
+ }
+
+ /* Check if full duplex is supported and set the vmac accordingly */
+ if (temp & LXT970A_STATUS2_FULL)
+ {
+ printf("EMAC : Full duplex\n");
+ duplex = ENFL_MASK;
+ }
+ else
+ {
+ printf("EMAC : Half duplex\n");
+ duplex = 0;
+ }
+
+
+
+
+
+ /* Allocate and set buffers for rx BD's */
+ for ( i=0 ; i<RX_BDT_LEN ; i++) {
+ rxbd[i].data = malloc(ETH_MTU +VMAC_BUFFER_PAD);
+ rxbd[i].info = OWN_MASK | (ETH_MTU + VMAC_BUFFER_PAD);
+ }
+
+ /* All TX BD's owned by CPU */
+ for ( i=0 ; i<TX_BDT_LEN ; i++) {
+ txbd[i].data = 0;
+ txbd[i].info = 0;
+ }
+
+ // seed with max value so it starts with 0 in rx loop
+ rxbd_cntr = RX_BDT_LEN - 1;
+
+ /* Set EMAC hardware address */
+ aa3_emac_set_address((void *)&default_addr);
+
+ /* Initialize logical address filter */
+ reg = reg_base_addr + LAFL_OFFSET;
+ (*reg ) = 0x0;
+ reg = reg_base_addr + LAFH_OFFSET;
+ (*reg ) = 0x0;
+
+ /* Set rx BD ring pointer */
+ reg = reg_base_addr + RXRINGPTR_OFFSET;
+ (*reg) = (unsigned int )rxbd;
+
+ /* Set tx BD ring pointer */
+ reg = reg_base_addr + TXRINGPTR_OFFSET;
+ (*reg) = (unsigned int )txbd;
+
+ /* Set Poll rate so that it polls every 1 ms*/
+ reg = reg_base_addr + POLLRATE_OFFSET;
+ (*reg) = (CONFIG_ARC_CLK/1000000);
+
+
+ /* Set CONTROL */
+ reg = reg_base_addr + CONTROL_OFFSET;
+ (*reg) = (RX_BDT_LEN << 24) | /* RX buffer desc table len */
+ (TX_BDT_LEN << 16) | /* TX buffer des tabel len */
+ TXRN_MASK | /* TX enable */
+ RXRN_MASK | /* RX enable */
+ PROM_MASK |
+ duplex; /* Full Duplex enable */
+
+ dev = (struct eth_device *) malloc(sizeof(*dev));
+ sprintf(dev->name,"ARC EMAC");
+ dev->init = arc_eth_init;
+ dev->halt = arc_eth_halt;
+ dev->send = arc_eth_send;
+ dev->recv = arc_eth_rx;
+ eth_register(dev);
+ out:
+ (*reg) |= EN_MASK; /* VMAC enable */
+ initialised = 1;
+ return (0);
+}
+
diff --git a/board/arcangel/arc_pgu.c b/board/arcangel/arc_pgu.c
new file mode 100644
index 0000000..f2c2b9a
--- /dev/null
+++ b/board/arcangel/arc_pgu.c
@@ -0,0 +1,63 @@
+#include <config.h>
+#include <common.h>
+#include <command.h>
+#include <version.h>
+#include <stdarg.h>
+#include <linux/types.h>
+
+#include <lcd.h>
+#include <asm/arc_pgu.h>
+
+#ifdef CONFIG_LCD
+
+char lcd_is_enabled;
+
+int lcd_line_length;
+int lcd_color_fg = 0xffff;
+int lcd_color_bg = 0x0;
+
+/*
+ * Frame buffer memory information
+ */
+void *lcd_base; /* Start of framebuffer memory */
+void *lcd_console_address; /* Start of console buffer */
+
+short console_col;
+short console_row;
+vidinfo_t panel_info = {
+ vl_col: 640,
+ vl_row: 480,
+ vl_bpix: 4,
+ hsync: 0x3f4f031f,
+ vsync: 0x020c01f0,
+ max_freq: 23850000
+};
+
+#define PGU_BASEADDR 0xC0FC8000
+
+static arc_pgu *pgu_ptr = (arc_pgu *)PGU_BASEADDR;
+
+void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
+{
+}
+
+void lcd_ctrl_init(void *lcdbase)
+{
+ lcd_base = lcdbase;
+ pgu_ptr->frm_start = (unsigned)lcdbase;
+ pgu_ptr->disp_dim = ENCODE_PGU_DIMS(panel_info.vl_col, panel_info.vl_row);
+ pgu_ptr->stride = 2 * panel_info.vl_col;
+
+ pgu_ptr->statctrl = STATCTRL_CONT_B_MASK | STATCTRL_PIX_FMT_RGB555 |
+ STATCTRL_HPOL_MASK | STATCTRL_VPOL_MASK | STATCTRL_DPOL_MASK;
+}
+
+void lcd_enable(void)
+{
+ pgu_ptr->statctrl |= STATCTRL_REG_DISP_EN_MASK;
+ while ((pgu_ptr->statctrl & STATCTRL_DISP_BUSY_MASK) &&
+ (pgu_ptr->statctrl & STATCTRL_BU_BUSY_MASK));
+}
+
+#endif
+
diff --git a/board/arcangel/config.mk b/board/arcangel/config.mk
new file mode 100644
index 0000000..54c71ed
--- /dev/null
+++ b/board/arcangel/config.mk
@@ -0,0 +1 @@
+TEXT_BASE=0x3000000
diff --git a/board/arcangel/ide.c b/board/arcangel/ide.c
new file mode 100644
index 0000000..560958f
--- /dev/null
+++ b/board/arcangel/ide.c
@@ -0,0 +1,171 @@
+/*
+ * (C) Copyright 2000-2006
+ * ARC International
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * AA4 IDE intitialization code cribed from arc_cobalt
+ *
+ */
+
+
+#include <common.h>
+
+#ifdef CONFIG_CMD_IDE
+
+static unsigned p_base_addr = (CONFIG_SYS_ATA_BASE_ADDR - 0x9000);
+/* ------------------------------------------------------------------------- */
+
+#define IDE_ID (* (volatile unsigned long *) (p_base_addr + 0x00009000))
+#define IDE_PIO (* (volatile unsigned long *) (p_base_addr + 0x00009004))
+#define IDE_STAT (* (volatile unsigned long *) (p_base_addr + 0x00009008))
+#define IDE_PIO_ACC (* (volatile unsigned long *) (p_base_addr + 0x000090A0))
+#define IDE_ERROR_REG (* (volatile unsigned long *) (p_base_addr + 0x000090A4))
+#define IDE_SEC_CNT (* (volatile unsigned long *) (p_base_addr + 0x000090A8))
+#define IDE_LBA_LOW (* (volatile unsigned long *) (p_base_addr + 0x000090AC))
+#define IDE_LBA_MID (* (volatile unsigned long *) (p_base_addr + 0x000090B0))
+#define IDE_LBA_HIGH (* (volatile unsigned long *) (p_base_addr + 0x000090B4))
+#define IDE_DEVICE_REG (* (volatile unsigned long *) (p_base_addr + 0x000090B8))
+#define IDE_CMD_REG (* (volatile unsigned long *) (p_base_addr + 0x000090BC))
+#define IDE_DEV_HEAD_CNTRL (* (volatile unsigned long *) (p_base_addr + 0x000090D8))
+#define IDE_ERROR_REG (* (volatile unsigned long *) (p_base_addr + 0x000090A4))
+#define IDE_ALT_STAT (* (volatile unsigned long *) (p_base_addr + 0x000090D8))
+
+void WaitForReady(void)
+{
+ // Bit 6 of the status register is the ready bit.
+ // Command register when read acts as the status register
+ unsigned long rdy;
+ do
+ {
+ rdy = IDE_CMD_REG;
+ }
+ while(!((rdy >> 6) & 0x01));
+}
+
+void WaitForBusyClear(void)
+{
+ int i=0;
+ // Bit 6 of the status register is the ready bit.
+ // Command register when read acts as the status register
+ unsigned long busy;
+ do
+ {
+ busy = IDE_CMD_REG;
+ if (i++ > 1000000)
+ {
+ printf("timeout in WaitForBusyClear, IDE_CMD_REG=%x\n", IDE_CMD_REG);
+ break;
+ }
+ }
+ while((busy >> 7) & 0x01);
+}
+
+
+void Delay_ms(int x)
+{
+ udelay (1000 * x);
+}
+
+#define PCMCIA_SHT(t) ((t & 0xff)<<16) /* Strobe Hold Time */
+#define PCMCIA_SST(t) ((t & 0xff)<<8) /* Strobe Setup Time */
+#define PCMCIA_SL(t) (t & 0xff) /* Strobe Length */
+
+static unsigned cy(unsigned x)
+{
+ return (x * (CONFIG_SYS_HZ/1000000))/1000;
+}
+
+int ide_preinit(void)
+{
+ unsigned pio_setup, pio_length, pio_hold, pio_total, timings;
+
+ printf("Resetting IDE device...\n");
+
+ /* setup PIO mode 0 */
+ pio_setup=cy(70);
+ pio_length=cy(165);
+ pio_hold=cy(30);
+ pio_total=cy(600);
+
+# define UNDER (pio_setup + pio_length + pio_hold < pio_total)
+ while (UNDER)
+ {
+ pio_length++;
+ if (UNDER) pio_setup++;
+ if (UNDER) pio_length++;
+ }
+
+ timings = PCMCIA_SHT(pio_hold)
+ | PCMCIA_SST(pio_setup)
+ | PCMCIA_SL (pio_length)
+ ;
+ printf("pio mode 0 timings (%u, %u %u) = %x\n", pio_setup, pio_length, pio_hold, timings);
+
+
+
+ // Set up the PIO Timing register
+ IDE_PIO = timings;
+
+ // Issue the hardware reset and wait for some cycle for the
+ // reset to complete.
+ // Bit 2 in the control register is the reset bit
+ // Writing 0 to it will reset it
+ IDE_STAT = 0x00;
+
+ // wait for the reset to complete
+ Delay_ms (5);
+
+ // Clear the IDE bus reset-line
+ IDE_STAT = 0x04;
+
+ // Wait for Busy bit to clear
+ WaitForBusyClear();
+
+
+ // Now set the software reset bit in the IDE
+ IDE_DEV_HEAD_CNTRL = 0x04;
+
+ // Wait for 5 ms
+ Delay_ms (5);
+
+ // Clear the S/W reset
+ IDE_DEV_HEAD_CNTRL = 0x00;
+
+ // Wait for Busy bit to clear
+ WaitForBusyClear();
+
+ // Chack if the device is ready
+ WaitForReady();
+
+ // Set the head number as 0 and the device to be master
+ // bits 3..0 of this register hold the head number (0..15) for a
+ // transfer. The bit 4 is to be written 0 for access to the IDE
+ // master device, 1 for access to the IDE slave device. The bits
+ // 7..5 are fixed at 101B in the traditional interface.
+ IDE_DEVICE_REG = 0x00;
+
+ WaitForReady();
+
+ // Wait for Busy bit to clear
+ WaitForBusyClear();
+
+ printf("IDE device reset OK.\n");
+ return 0;
+}
+
+#endif
diff --git a/board/arcangel/serial.c b/board/arcangel/serial.c
new file mode 100644
index 0000000..354232e
--- /dev/null
+++ b/board/arcangel/serial.c
@@ -0,0 +1,97 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * cpu/arc/serial.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#include <common.h>
+#include <asm/serial.h>
+
+volatile arc_uart *uart = (arc_uart *) UART_BASEADDR;
+
+/*
+ * Sets baudarate
+ */
+void serial_setbrg (void)
+{
+
+ DECLARE_GLOBAL_DATA_PTR;
+ int arc_console_baud = gd->cpu_clk/(gd->baudrate*4) - 1;
+// int arc_console_baud = 65000000 /(57600*4) - 1;
+
+ /* Set the baud rate */
+ uart->baudl = arc_console_baud & 0xff;
+ uart->baudh = (arc_console_baud & 0xff00) >> 8;
+}
+
+/*
+ * Intialise the serial port with given baudrate
+ */
+int serial_init (void)
+{
+ serial_setbrg ();
+
+ return 0;
+}
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc (const char c)
+{
+// volatile char * u = 0xc0fc1010;
+
+// *u = 65;
+
+ if (c == '\n')
+ serial_putc('\r');
+
+ /* Wait till dataTx register is empty */
+ while (!(uart->status & UART_TXEMPTY));
+
+ uart->data = c;
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise 0.
+ */
+int serial_tstc (void)
+{
+ return !(uart->status & UART_RXEMPTY);
+}
+
+/*
+ * Read a single byte from the serial port.
+ */
+int serial_getc (void)
+{
+ unsigned char ch;
+
+ /* Wait till character is placed in fifo */
+ while (uart->status & UART_RXEMPTY);
+
+ /* Also check for overflow errors */
+ if (uart->status & UART_OVERFLOW_ERR)
+ return 0;
+
+ ch = uart->data & 0x00ff;
+ return ((int)ch);
+}
+
+void serial_puts (const char *s)
+{
+ while (*s) {
+ serial_putc (*s++);
+ }
+}
+
diff --git a/board/arcangel/u-boot.lds b/board/arcangel/u-boot.lds
new file mode 100644
index 0000000..1a506f2
--- /dev/null
+++ b/board/arcangel/u-boot.lds
@@ -0,0 +1,87 @@
+OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
+OUTPUT_ARCH(arc)
+ENTRY(_start)
+SECTIONS
+{
+
+ . = ALIGN(4);
+
+ __vector_start = .;
+ .vector :
+ {
+ *(.vector);
+ }
+ __vector_end = .;
+
+ . = ALIGN(4);
+ .text :
+ {
+
+ __text_start = .;
+ cpu/arc700/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ __text_end = .;
+
+ .sdata :
+ {
+ __SDATA_BEGIN__ = .;
+ *(.sdata .sdata.* .gnu.linkonce.s.*)
+ }
+
+ __bss_start = .;
+ .sbss : {
+ PROVIDE (__sbss_start = .);
+ *(.sbss .sbss.* .gnu.linkonce.sb.*)
+ PROVIDE (__sbss_end = .);
+ }
+
+ .bss : {
+ *(.bss)
+ }
+
+ __bss_end = .;
+
+ __data_start = .;
+ .rodata : {
+ *(.rodata .rodata.*)
+
+ }
+
+ . = ALIGN(4);
+
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = ALIGN(4);
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+
+ __data_end = .;
+
+
+ /* following statement was added to be able to debug using mdb */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+
+}
diff --git a/board/ml50x/Makefile b/board/ml50x/Makefile
new file mode 100644
index 0000000..99d56aa
--- /dev/null
+++ b/board/ml50x/Makefile
@@ -0,0 +1,40 @@
+#
+# Copyright Codito Technologies (www.codito.com)
+#
+# board/aa3/Makefile
+#
+# Copyright (C)
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License version 2 as
+# published by the Free Software Foundation.
+#
+# Authors : Sandeep Patil (sandeep.patil@codito.com)
+# Pradeep Sawlani (pradeep.sawlani@codito.com)
+#
+
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := ml50x.o serial.o
+SOBJS :=
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/ml50x/config.mk b/board/ml50x/config.mk
new file mode 100644
index 0000000..b7173a1
--- /dev/null
+++ b/board/ml50x/config.mk
@@ -0,0 +1,13 @@
+PLATFORM_CPPFLAGS += -DARC_BOARD_TIMER=$(CONFIG_ARC_BOARD_TIMER)
+
+ifeq ($(CONFIG_ARC_CPU_BUS_WIDTH),32)
+# 0x200 bytes are reserved for bootrom
+TEXT_BASE=0x40000200
+PLATFORM_CPPFLAGS += -DCONFIG_LOADADDR=0x40650000
+endif
+
+ifeq ($(CONFIG_ARC_CPU_BUS_WIDTH),24)
+# 0x200 bytes are reserved for bootrom
+TEXT_BASE=0x400200
+PLATFORM_CPPFLAGS += -DCONFIG_LOADADDR=0x650000
+endif
diff --git a/board/ml50x/ml50x.c b/board/ml50x/ml50x.c
new file mode 100644
index 0000000..9f91772
--- /dev/null
+++ b/board/ml50x/ml50x.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * board/aa3/aa3.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#include <asm/arcregs.h>
+
+#include <linux/types.h>
+#include <config.h>
+#include <asm/global_data.h> /* For global data structre */
+#include <asm/sys_ctrl.h>
+
+#define TIMER_WRAP 0xffffffff /* Maximum limit for timer */
+
+#if ARC_BOARD_TIMER==0
+#define BOARD_REG_TIMER_LIMIT ARC_REG_TIMER0_LIMIT
+#define BOARD_REG_TIMER_CTRL ARC_REG_TIMER0_CTRL
+#define BOARD_REG_TIMER_CNT ARC_REG_TIMER0_CNT
+#else
+#define BOARD_REG_TIMER_LIMIT ARC_REG_TIMER1_LIMIT
+#define BOARD_REG_TIMER_CTRL ARC_REG_TIMER1_CTRL
+#define BOARD_REG_TIMER_CNT ARC_REG_TIMER1_CNT
+#endif
+
+static ulong timestamp;
+
+#ifdef CONFIG_ARC_SYS_CTRL_DEV
+static sys_ctrl_reg_t *sys_ctrl_dev = SYS_CTRL_DEVICE_ADDRESS;
+#endif
+
+/* Function to start timer from 'count' */
+void set_timer (ulong count)
+{
+ /* Set up the LIMIT , COUNT and CONTROL registers for timer without interrupt */
+ write_new_aux_reg(BOARD_REG_TIMER_CTRL, 0);
+ write_new_aux_reg(BOARD_REG_TIMER_LIMIT, TIMER_WRAP);
+ write_new_aux_reg(BOARD_REG_TIMER_CTRL, 2);
+ write_new_aux_reg(BOARD_REG_TIMER_CNT, count);
+}
+
+/* Function to get the current count value */
+ulong get_timer (ulong base)
+{
+ /* Read the count value from COUNT0 */
+ timestamp = read_new_aux_reg(BOARD_REG_TIMER_CNT);
+ return timestamp - base;
+}
+
+void reset_timer(void)
+{
+ set_timer(0);
+}
+
+void uninit_timer(void)
+{
+ write_new_aux_reg(BOARD_REG_TIMER_LIMIT, TIMER_WRAP);
+ write_new_aux_reg(BOARD_REG_TIMER_CNT, 0);
+ write_new_aux_reg(BOARD_REG_TIMER_CTRL, 0);
+}
+
+/* Delay function */
+void udelay (unsigned long usec)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ ulong uTicks;
+ set_timer(0);
+ uTicks = (gd->cpu_clk/1000000) * usec;
+ /* Continue looping till the timer count is more thean the required delay */
+ while(get_timer(0) < uTicks);
+}
+
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gd->cpu_clk = CONFIG_ARC_CLK;
+ /* Intialise the timer */
+ reset_timer();
+
+ /* address of kernel parameters */
+ gd->bd->bi_boot_params = TEXT_BASE - CONFIG_SYS_MALLOC_LEN + CONFIG_SYS_ENV_SIZE;
+
+ return 0;
+}
diff --git a/board/ml50x/serial.c b/board/ml50x/serial.c
new file mode 100644
index 0000000..c0af2be
--- /dev/null
+++ b/board/ml50x/serial.c
@@ -0,0 +1,87 @@
+
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * cpu/arc/serial.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#include <common.h>
+#include <asm/serial.h>
+
+volatile arc_uart *uart = (arc_uart *) UART_BASEADDR;
+
+/*
+ * Sets baudarate
+ */
+void serial_setbrg (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ int arc_console_baud = gd->cpu_clk/(gd->baudrate*4) - 1;
+ uart->baudl = arc_console_baud & 0xff;
+ uart->baudh = (arc_console_baud & 0xff00) >> 8;
+}
+
+/*
+ * Intialise the serial port with given baudrate
+ */
+int serial_init (void)
+{
+ serial_setbrg ();
+ return 0;
+}
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc (const char c)
+{
+ if (c == '\n')
+ serial_putc('\r');
+ /* Wait till dataTx register is empty */
+ while (!(uart->status & UART_TXEMPTY));
+ uart->data = c;
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise 0.
+ */
+int serial_tstc (void)
+{
+ return !(uart->status & UART_RXEMPTY);
+}
+
+/*
+ * Read a single byte from the serial port.
+ */
+int serial_getc (void)
+{
+ unsigned char ch;
+
+ /* Wait till character is placed in fifo */
+ while (uart->status & UART_RXEMPTY);
+
+ /* Also check for overflow errors */
+ if (uart->status & UART_OVERFLOW_ERR)
+ return 0;
+
+ ch = uart->data & 0x00ff;
+ return ((int)ch);
+}
+
+void serial_puts (const char *s)
+{
+ while (*s)
+ serial_putc (*s++);
+}
+
diff --git a/board/ml50x/u-boot.lds b/board/ml50x/u-boot.lds
new file mode 100644
index 0000000..2c5452c
--- /dev/null
+++ b/board/ml50x/u-boot.lds
@@ -0,0 +1,68 @@
+OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
+OUTPUT_ARCH(arc)
+ENTRY(_start)
+SECTIONS
+{
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+
+ .text :
+ {
+ __vector_start = .;
+ cpu/arc/vector.o (.vector)
+ *(.vector);
+ . = 0x200;
+ __vector_end = .;
+
+ __text_start = .;
+ cpu/arc/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ __text_end = .;
+
+ __data_start = .;
+
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+
+ .got : { *(.got) }
+
+ . = ALIGN(4);
+
+ __u_boot_cmd_start = .;
+
+ .u_boot_cmd : { *(.u_boot_cmd) }
+
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+
+ __data_end = .;
+
+ __bss_start = .;
+
+ .bss : { *(.bss) }
+
+ __bss_end = .;
+}
diff --git a/board/ml50x/u-boot.lds.flash b/board/ml50x/u-boot.lds.flash
new file mode 100644
index 0000000..2e67cf2
--- /dev/null
+++ b/board/ml50x/u-boot.lds.flash
@@ -0,0 +1,47 @@
+OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
+OUTPUT_ARCH(arc)
+ENTRY(_start)
+SECTIONS
+{
+
+ . = ALIGN(4);
+
+
+ .text :
+ {
+ __vector_start = .;
+ *(.vector)
+ . = ALIGN(4);
+ __vector_end = .;
+
+ __text_start = .;
+ cpu/arc/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ __text_end = .;
+
+ __data_start = .;
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+
+ .data : { *(.data) }
+
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = ALIGN(4);
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+
+ __data_end = .;
+
+ __bss_start = .;
+ .bss : { *(.bss) }
+ __bss_end = .;
+}
diff --git a/board/ml50x/u-boot.lds.ram b/board/ml50x/u-boot.lds.ram
new file mode 100644
index 0000000..d3be27d
--- /dev/null
+++ b/board/ml50x/u-boot.lds.ram
@@ -0,0 +1,46 @@
+OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
+OUTPUT_ARCH(arc)
+ENTRY(_start)
+SECTIONS
+{
+
+ . = ALIGN(4);
+
+
+ .vector :
+ {
+ *(.vector);
+ }
+ . = ALIGN(4);
+ .text :
+ {
+
+ __text_start = .;
+ cpu/arc/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ __text_end = .;
+
+ __data_start = .;
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = ALIGN(4);
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+
+ __data_end = .;
+
+ __bss_start = .;
+ .bss : { *(.bss) }
+ __bss_end = .;
+}
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index bd1813a..d5772e2 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -191,6 +191,8 @@
#define IH_INITRD_ARCH IH_ARCH_SH
#elif defined(__sparc__)
#define IH_INITRD_ARCH IH_ARCH_SPARC
+#elif defined(__arc__)
+ #define IH_INITRD_ARCH IH_ARCH_ARC
#else
# error Unknown CPU type
#endif
@@ -909,7 +911,9 @@
debug (" kernel data at 0x%08lx, len = 0x%08lx (%ld)\n",
*os_data, *os_len, *os_len);
-
+#if defined(CONFIG_ARC) && defined(CONFIG_CMD_NET) && defined(CONFIG_ARC_AA4_BOARD)
+ eth_stop();
+#endif
return (void *)img_addr;
}
diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 83e7589..18bdb42 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -19,6 +19,7 @@
#include <net.h>
#include <elf.h>
#include <vxworks.h>
+#include <asm/uboot-arc.h>
#if defined(CONFIG_WALNUT) || defined(CONFIG_SYS_VXWORKS_MAC_PTR)
DECLARE_GLOBAL_DATA_PTR;
@@ -41,6 +42,9 @@
if (dcache)
dcache_disable ();
+#if defined(CONFIG_ARC) && defined(CONFIG_CMD_NET) && defined(CONFIG_ARC_AA4_BOARD)
+ eth_stop();
+#endif
/*
* pass address parameter as argv[0] (aka command name),
* and all remaining args
@@ -219,6 +223,54 @@
return 1;
}
+#if defined(CONFIG_BOOTMQX)
+
+extern int init_mqx_context(void);
+extern int cleanup_mqx_context(void);
+
+int do_bootmqx (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ unsigned long addr; /* Address of the ELF image */
+ unsigned long rc; /* Return value from user code */
+
+ /* -------------------------------------------------- */
+ int rcode = 0;
+
+ if (argc < 2)
+ addr = load_addr;
+ else
+ addr = simple_strtoul (argv[1], NULL, 16);
+
+ if (!valid_elf_image (addr))
+ return 1;
+
+ addr = load_elf_image (addr);
+ if(addr == 0)
+ return 1;
+
+ if(init_mqx_context() != 0)
+ return 1;
+
+ printf ("## Starting application at 0x%08lx ...\n", addr);
+
+ /*
+ * pass address parameter as argv[0] (aka command name),
+ * and all remaining args
+ */
+ rc = do_bootelf_exec ((void *)addr, argc - 1, argv + 1);
+ if (rc != 0)
+ rcode = 1;
+
+ if(cleanup_mqx_context() != 0)
+ return 1;
+
+ printf ("## Application terminated, rc = 0x%lx\n", rc);
+ return rcode;
+}
+
+#endif
+
+
/* ======================================================================
* Determine if a valid ELF image exists at the given memory location.
* First looks at the ELF header magic field, the makes sure that it is
@@ -264,7 +316,44 @@
unsigned char *strtab = 0; /* String table pointer */
unsigned char *image; /* Binary image pointer */
int i; /* Loop counter */
+#ifdef CONFIG_ELF_GUARD
+ unsigned long addr_chk;
+ int r;
+ struct mem_region_s
+ {
+ unsigned long start, end;
+ };
+ typedef struct mem_region_s mem_region_t;
+
+ mem_region_t regions[] = {
+#ifndef CONFIG_ARC_AA4_BOARD
+ /* xxxload commands space */
+ {.start = CONFIG_LOADADDR,
+ .end = CONFIG_LOADADDR + simple_strtoul(getenv("filesize"),
+ NULL, 16)
+ },
+ /* u-boot */
+ {.start = TEXT_BASE,
+ .end = (unsigned)&__bss_end + CONFIG_SYS_MALLOC_LEN
+ },
+#else
+ {.start = TEXT_BASE - CONFIG_SYS_MALLOC_LEN,
+ .end = (unsigned)&__data_end
+ },
+#endif
+#ifndef CONFIG_ARC_AA4_BOARD
+ /* periphery space */
+ {.start = ARC_CPU_PERIPHERAL_BASE,
+ .end = ARC_CPU_PERIPHERAL_BASE + 0x20000
+ },
+ /* bootrom space */
+ {.start = 0,
+ .end = TEXT_BASE
+ }
+#endif
+ };
+#endif
/* -------------------------------------------------- */
ehdr = (Elf32_Ehdr *) addr;
@@ -286,6 +375,22 @@
continue;
}
+#ifdef CONFIG_ELF_GUARD
+ for(r = 0; r < sizeof(regions)/sizeof(mem_region_t); r++) {
+#ifndef CONFIG_ARC_AA4_BOARD
+ addr_chk = shdr->sh_addr;
+#else
+ addr_chk = shdr->sh_addr - 0x80000000; // XXX some kernels don't start here
+#endif
+ if(addr_chk >= regions[r].start && addr_chk <= regions[r].end) {
+ printf (".%s load address [0x%08lx] clobbers uboot [%x:%x]\n",
+ &strtab[shdr->sh_name],
+ addr_chk, regions[r].start, regions[r].end);
+ return 0;
+ }
+ }
+#endif
+
if (strtab) {
printf ("%sing %s @ 0x%08lx (%ld bytes)\n",
(shdr->sh_type == SHT_NOBITS) ?
@@ -321,3 +426,13 @@
"Boot vxWorks from an ELF image",
" [address] - load address of vxWorks ELF image.\n"
);
+
+#if defined(CONFIG_BOOTMQX)
+
+U_BOOT_CMD(
+ bootmqx, 2, 0, do_bootmqx,
+ "Boot MQX from an ELF image",
+ " [address] - load address of MQX ELF image.\n"
+);
+
+#endif
diff --git a/config.mk b/config.mk
index b1254e9..8a89f5f 100644
--- a/config.mk
+++ b/config.mk
@@ -54,6 +54,11 @@
HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer
HOSTSTRIP = strip
+
+ifeq ($(ARCH),arc)
+ PLATFORM_CPPFLAGS+= -D__ARC__ -Os -g -mno-volatile-cache -fomit-frame-pointer
+endif
+
#########################################################################
#
# Option checker (courtesy linux kernel) to ensure
diff --git a/cpu/arc/Makefile b/cpu/arc/Makefile
new file mode 100644
index 0000000..8107049
--- /dev/null
+++ b/cpu/arc/Makefile
@@ -0,0 +1,36 @@
+#
+# Copyright Codito Technologies (www.codito.com)
+#
+# cpu/arc/Makefile
+#
+# Copyright (C)
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License version 2 as
+# published by the Free Software Foundation.
+#
+# Authors : Sandeep Patil (sandeep.patil@codito.com)
+# Pradeep Sawlani (pradeep.sawlani@codito.com)
+#
+
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(CPU).a
+
+SOBJS = vector.o start.o
+OBJS = cpu.o interrupts.o
+
+all: .depend $(SOBJS) $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/cpu/arc/config.mk b/cpu/arc/config.mk
new file mode 100644
index 0000000..e85a1b6
--- /dev/null
+++ b/cpu/arc/config.mk
@@ -0,0 +1,10 @@
+PLATFORM_CPPFLAGS += -mA6 -EL
+PLATFORM_LDFLAGS += -EL
+
+ifeq ($(CONFIG_ARC_CPU_BUS_WIDTH),32)
+PLATFORM_CPPFLAGS += -DARC_CPU_PERIPHERAL_BASE=0xFC000000
+endif
+
+ifeq ($(CONFIG_ARC_CPU_BUS_WIDTH),24)
+PLATFORM_CPPFLAGS += -DARC_CPU_PERIPHERAL_BASE=0x00FC0000
+endif
diff --git a/cpu/arc/cpu.c b/cpu/arc/cpu.c
new file mode 100644
index 0000000..d4df7be
--- /dev/null
+++ b/cpu/arc/cpu.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * cpu/arc/cpu.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors :Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#include <command.h>
+#include <common.h>
+#include <asm/arcregs.h>
+
+
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+
+#if CFG_UBOOT_ON_FLASH
+ /* if uboot is on flash then boot agian from flash */
+ void (*reset)();
+ reset = (void (*)())0x0;
+ (*reset)();
+#endif
+ return 0;
+}
+
+
+void disable_icache(void)
+{
+ __asm__ __volatile ( "lr r0,[0x11] \n\t"
+ "or r0,r0,1 \n\t"
+ "sr r0,[0x11] \n\t"
+ ::
+ :"r0");
+
+}
+void dcache_disable(void)
+{
+ /* Flush D cache */
+ __asm__ __volatile (
+ "sr 1, [0x47] \n\t"
+ ::
+ );
+ /* Disable D cache */
+ __asm__ __volatile (
+ "lr r0,[0x48] \n\t"
+ "or r0,r0,1 \n\t"
+ "sr r0,[0x48] \n\t"
+ ::
+ :"r0");
+
+
+
+}
+
+void dcache_enable()
+{
+
+}
+
+int dcache_status()
+{
+ return 0;
+}
+
+
+
+void flush_cache (unsigned long dummy1, unsigned long dummy2)
+{
+ /* flushing data cache */
+ write_new_aux_reg(ARC_REG_DC_FLSH, 1);
+
+ /* poll for completion */
+ while (read_new_aux_reg(ARC_REG_DC_CTRL) & (1<<8));
+
+ /* Invalidate instruction cache */
+ write_new_aux_reg(ARC_REG_IC_IVIC, 1);
+
+ /* read will only comple when invalidation complete */
+ read_new_aux_reg(ARC_REG_IC_CTRL);
+}
+
+/*
+ * disable dcache and icahce
+ */
+
+int cpu_init(void)
+{
+ disable_interrupts();
+ return 0;
+}
+
+
diff --git a/cpu/arc/interrupts.c b/cpu/arc/interrupts.c
new file mode 100644
index 0000000..0f1e08c
--- /dev/null
+++ b/cpu/arc/interrupts.c
@@ -0,0 +1,39 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * cpu/arc/interrupts.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+#include <asm/arcregs.h>
+
+void disable_interrupts(void)
+{
+ unsigned int status;
+ status = read_new_aux_reg(ARC_REG_STATUS32);
+ status &= STATUS_DISABLE_INTERRUPTS;
+/* write_new_aux_reg(ARC_REG_STATUS32,status); */
+ __asm__ __volatile__ (
+ "FLAG %0"
+ :
+ :"r"(status)
+ );
+
+}
+
+void enable_interrupts(void)
+{
+ unsigned int status ;
+ status = read_new_aux_reg(ARC_REG_STATUS32);
+ status |= STATUS_E1_MASK;
+ status |= STATUS_E2_MASK;
+ write_new_aux_reg(ARC_REG_STATUS32,status);
+}
+
diff --git a/cpu/arc/start.S b/cpu/arc/start.S
new file mode 100644
index 0000000..961f63a
--- /dev/null
+++ b/cpu/arc/start.S
@@ -0,0 +1,165 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * cpu/arc/start.S
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#include <asm/arcregs.h> /* required for STATUS_H_SET */
+#include <config.h>
+
+ /* .text section loaded at TEXT_BASE defined in board/aa3/config.mk */
+ .section .text , "ax" , @progbits
+ .type _start, @function
+ .align 4
+ .globl _start
+
+.globl _bss_start
+_bss_start:
+ .word __bss_start
+
+.globl _bss_end
+_bss_end:
+ .word __bss_end
+
+.globl _arcboot_start
+_arcboot_start:
+ .word _start
+
+_start:
+ /* Disable interrupts */
+ lr r2,[ARC_REG_STATUS32]
+ and r2,r2,STATUS_DISABLE_INTERRUPTS
+ sr r2,[ARC_REG_STATUS32]
+
+#if defined(CONFIG_SYS_RELOCATE)
+ /* For relocation following registers are used :
+ * r1 : destination
+ * r2 : source
+ * r3 : till
+ * r4 : jump to next loop
+ * r5 : temporary storage
+ * r6 : jump to same loop
+ */
+
+ /* Relocate vector table if necessary */
+#if defined(CONFIG_SYS_RELOCATE_VEC)
+
+ mov r1,CONFIG_SYS_RELOCATE_DEST
+ /* vector table start address in flash is (__vector_start +
+ flash base - text base) since vector start and text base
+ are same we move only CONFIG_SYS_RELOCATE_BASE */
+ mov r2, __vector_start
+
+ /* vector end table address in flash is (__vector_end + flash
+ base - text base) */
+ mov r3,__vector_end
+ add r3,r3,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+ /* address of relocate text in flash = relocate text + flash
+ base - text base */
+ mov r4,relocate_text
+ add r4,r4,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+ mov r6,copy_vector_table
+ add r6,r6,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+copy_vector_table :
+
+ cmp r2,r3
+ jeq [r4]
+
+ /* copy from r2 to dest i.e in r1 register which point to CONFIG_SYS_RELOCATE_DEST */
+ ld.ab r5,[r2,4]
+ st.ab r5,[r1,4]
+
+ j [r6]
+
+#endif /* CONFIG_SYS_RELOCATE_VEC */
+
+ /* Relocate text section */
+relocate_text:
+ mov r1,__text_start
+
+ mov r2,__text_start
+ add r2,r2,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+ mov r3,__text_end
+ add r3,r3,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+ mov r4,relocate_data
+ add r4,r4,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+ mov r6,copy_text_section
+ add r6,r6,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+copy_text_section :
+ cmp r2,r3
+ jeq [r4]
+
+ /* copy from r2 to dest i.e in r1 register */
+ ld.ab r5,[r2,4]
+ st.ab r5,[r1,4]
+
+ j [r6]
+
+ /* Relocate data section */
+relocate_data:
+ mov r1,__data_start
+
+ mov r2,__data_start
+ add r2,r2,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+ mov r3,__data_end
+ add r3,r3,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+ mov r4,fill_bss
+
+ mov r6,copy_data_section
+ add r6,r6,CONFIG_SYS_RELOCATE_BASE-TEXT_BASE
+
+copy_data_section :
+
+ cmp r2,r3
+ jeq [r4]
+
+ /* copy from r2 to dest i.e in r1 register */
+ ld.ab r5,[r2,4]
+ st.ab r5,[r1,4]
+
+ j [r6]
+
+
+#endif /* CONFIG_SYS_RELOCATE */
+
+ /* This code will be executed from ram */
+ .globl fill_bss
+fill_bss:
+ /* Clear bss */
+ mov_s r2, __bss_start
+ mov_s r3, __bss_end
+
+_clear_bss:
+ st.ab 0,[r2,4]
+ brlt r2,r3,_clear_bss
+
+ /* setup stack pointer after bss segment*/
+ mov sp, __bss_end
+ mov fp,sp
+ jal start_arcboot
+
+ .globl halt_stub
+halt_stub:
+ /* Halt Core */
+ flag STATUS_H_SET ; halt processor
+ nop
+ nop
+
diff --git a/cpu/arc/vector.S b/cpu/arc/vector.S
new file mode 100644
index 0000000..5414620
--- /dev/null
+++ b/cpu/arc/vector.S
@@ -0,0 +1,13 @@
+#include <asm/arcregs.h> /* required for STATUS_H_SET */
+#include <config.h>
+
+ .section .vector , "ax" , @progbits
+ .globl vector
+
+vector:
+jal _start
+jal halt_stub
+jal halt_stub
+jal halt_stub
+jal halt_stub
+jal halt_stub
diff --git a/cpu/arc700/Makefile b/cpu/arc700/Makefile
new file mode 100644
index 0000000..6b683f3
--- /dev/null
+++ b/cpu/arc700/Makefile
@@ -0,0 +1,36 @@
+#
+# Copyright Codito Technologies (www.codito.com)
+#
+# cpu/arc/Makefile
+#
+# Copyright (C)
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License version 2 as
+# published by the Free Software Foundation.
+#
+# Authors : Sandeep Patil (sandeep.patil@codito.com)
+# Pradeep Sawlani (pradeep.sawlani@codito.com)
+#
+
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(CPU).a
+
+START = start.o
+OBJS = cpu.o interrupts.o
+
+all: .depend $(START) $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/cpu/arc700/config.mk b/cpu/arc700/config.mk
new file mode 100644
index 0000000..c17c018
--- /dev/null
+++ b/cpu/arc700/config.mk
@@ -0,0 +1 @@
+PLATFORM_CPPFLAGS += -mA7
diff --git a/cpu/arc700/cpu.c b/cpu/arc700/cpu.c
new file mode 100644
index 0000000..6d24a86
--- /dev/null
+++ b/cpu/arc700/cpu.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * cpu/arc/cpu.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors :Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#include <command.h>
+#include <common.h>
+#include <asm/arcregs.h>
+
+
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+
+#if CFG_UBOOT_ON_FLASH
+ /* if uboot is on flash then boot agian from flash */
+ void (*reset)();
+ reset = (void (*)())0x0;
+ (*reset)();
+#endif
+ return 0;
+}
+
+
+void disable_icache(void)
+{
+ __asm__ __volatile ( "lr r0,[0x11] \n\t"
+ "or r0,r0,1 \n\t"
+ "sr r0,[0x11] \n\t"
+ ::
+ :"r0");
+
+}
+void dcache_disable(void)
+{
+ /* Flush D cache */
+ __asm__ __volatile (
+ "sr 1, [0x47] \n\t"
+ ::
+ );
+ /* Disable D cache */
+ __asm__ __volatile (
+ "lr r0,[0x48] \n\t"
+ "or r0,r0,1 \n\t"
+ "sr r0,[0x48] \n\t"
+ ::
+ :"r0");
+
+
+
+}
+
+void dcache_enable(void)
+{
+
+}
+
+int dcache_status()
+{
+ return 0;
+}
+
+
+
+void flush_cache (unsigned long dummy1, unsigned long dummy2)
+{
+ /* flushing data cache */
+ write_new_aux_reg(ARC_REG_DC_FLSH, 1);
+
+ /* poll for completion */
+ while (read_new_aux_reg(ARC_REG_DC_CTRL) & (1<<8));
+
+ /* Invalidate instruction cache */
+ write_new_aux_reg(ARC_REG_IC_IVIC, 1);
+
+ /* read will only comple when invalidation complete */
+ read_new_aux_reg(ARC_REG_IC_CTRL);
+}
+
+/*
+ * disable dcache and icahce
+ */
+
+int cpu_init(void)
+{
+ disable_interrupts();
+ return 0;
+}
+
+
diff --git a/cpu/arc700/interrupts.c b/cpu/arc700/interrupts.c
new file mode 100644
index 0000000..0f1e08c
--- /dev/null
+++ b/cpu/arc700/interrupts.c
@@ -0,0 +1,39 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * cpu/arc/interrupts.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+#include <asm/arcregs.h>
+
+void disable_interrupts(void)
+{
+ unsigned int status;
+ status = read_new_aux_reg(ARC_REG_STATUS32);
+ status &= STATUS_DISABLE_INTERRUPTS;
+/* write_new_aux_reg(ARC_REG_STATUS32,status); */
+ __asm__ __volatile__ (
+ "FLAG %0"
+ :
+ :"r"(status)
+ );
+
+}
+
+void enable_interrupts(void)
+{
+ unsigned int status ;
+ status = read_new_aux_reg(ARC_REG_STATUS32);
+ status |= STATUS_E1_MASK;
+ status |= STATUS_E2_MASK;
+ write_new_aux_reg(ARC_REG_STATUS32,status);
+}
+
diff --git a/cpu/arc700/start.S b/cpu/arc700/start.S
new file mode 100644
index 0000000..ca54b8b
--- /dev/null
+++ b/cpu/arc700/start.S
@@ -0,0 +1,176 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * cpu/arc/start.S
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#include <asm/arcregs.h> /* required for STATUS_H_SET */
+#include <config.h>
+
+ /* .text section loaded at TEXT_BASE defined in board/aa3/config.mk */
+ .section .text , "ax" , @progbits
+ .type _start, @function
+ .align 4
+ .globl _start
+
+.globl _TEXT_BASE
+_TEXT_BASE:
+ .word TEXT_BASE
+
+.globl _bss_start
+_bss_start:
+ .word __bss_start
+
+.globl _bss_end
+_bss_end:
+ .word __bss_end
+
+.globl _arcboot_start
+_arcboot_start:
+ .word _start
+
+_start:
+ mov gp, __SDATA_BEGIN__
+ /* Disable interrupts */
+/* lr r2,[ARC_REG_STATUS32]
+ and r2,r2,STATUS_DISABLE_INTERRUPTS
+ sr r2,[ARC_REG_STATUS32]
+*/
+
+#if CONFIG_SYS_UBOOT_ON_FLASH
+ /* For relocation following registers are used :
+ * r1 : destination
+ * r2 : source
+ * r3 : till
+ * r4 : jump to next loop
+ * r5 : temporary storage
+ * r6 : jump to same loop
+ */
+
+ /* Relocate vector table if necessary */
+#if CONFIG_SYS_FLASH_BASE
+
+ mov r1,0x0
+ mov r2,CONFIG_SYS_FLASH_BASE /* vector table start address in flash is (__vector_start + flash base - text base) since vector start and text base
+ are same we move only CONFIG_SYS_FLASH_BASE */
+
+
+ mov r3,__vector_end /* vector end table address in flash is (__vector_end + flash base - text base) */
+ add r3,r3,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+ mov r4,relocate_text /* address of relocate text in flash = relocate text + flash base - text base */
+ add r4,r4,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+ mov r6,copy_vector_table
+ add r6,r6,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+copy_vector_table :
+ cmp r2,r3
+ JEQ [r4]
+
+ /* copy from r2 to dest i.e in r1 register which point to 0x0 */
+ ld.ab r5,[r2,4]
+ st.ab r5,[r1,4]
+
+ j [r6]
+
+#endif /* CONFIG_SYS_FLASH_BASE */
+
+ /* Relocate text section */
+relocate_text:
+ mov r1,__text_start
+
+ mov r2,__text_start
+ add r2,r2,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+ mov r3,__text_end
+ add r3,r3,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+
+ mov r4,relocate_data
+ add r4,r4,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+ mov r6,copy_text_section
+ add r6,r6,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+copy_text_section :
+ cmp r2,r3
+ JEQ [r4]
+
+ /* copy from r2 to dest i.e in r1 register */
+ ld.ab r5,[r2,4]
+ st.ab r5,[r1,4]
+
+ j [r6]
+
+
+ /* Relocate data section */
+relocate_data:
+ mov r1,__data_start
+
+ mov r2,__data_start
+ add r2,r2,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+ mov r3,__data_end
+ add r3,r3,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+ mov r4,fill_bss
+
+ mov r6,copy_data_section
+ add r6,r6,CONFIG_SYS_FLASH_BASE-TEXT_BASE
+
+copy_data_section :
+
+ cmp r2,r3
+ JEQ [r4]
+
+ /* copy from r2 to dest i.e in r1 register */
+ ld.ab r5,[r2,4]
+ st.ab r5,[r1,4]
+
+ j [r6]
+
+
+#endif /* FLASH */
+/* This code will be executed from ram */
+ .globl fill_bass
+fill_bss:
+ /* Clear bss */
+ mov_s r2, __bss_start
+ mov_s r3, __bss_end
+
+_clear_bss:
+ st.ab 0,[r2,4]
+ brlt r2,r3,_clear_bss
+
+ /* setup stack pointer */
+ mov sp,TEXT_BASE - CONFIG_SYS_MALLOC_LEN - 4
+ mov fp,sp
+ jal start_arcboot
+
+ /* Interrupt service routines */
+res_service :
+mem_service :
+instr_service :
+handle_interrupt:
+EV_MachineCheck :
+
+EV_TLBMissI :
+EV_TLBMissD :
+EV_TLBProtV :
+EV_PrivilegeV :
+EV_Trap :
+EV_Extension :
+reserved :
+ FLAG STATUS_H_SET
+ NOP
+ NOP
+ NOP
diff --git a/drivers/block/systemace.c b/drivers/block/systemace.c
index e8dff0a..bf452aa 100644
--- a/drivers/block/systemace.c
+++ b/drivers/block/systemace.c
@@ -53,19 +53,29 @@
*/
#if (CONFIG_SYS_SYSTEMACE_WIDTH == 8)
#if !defined(__BIG_ENDIAN)
-#define ace_readw(off) ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)<<8) | \
- (readb(CONFIG_SYS_SYSTEMACE_BASE+off+1)))
-#define ace_writew(val, off) {writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off); \
- writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off+1);}
+#define ace_readw(off) \
+ ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)<<8) | \
+ (readb(CONFIG_SYS_SYSTEMACE_BASE+off+1)))
+
+#define ace_writew(val, off) \
+ {writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off); \
+ writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off+1);}
#else
-#define ace_readw(off) ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)) | \
- (readb(CONFIG_SYS_SYSTEMACE_BASE+off+1)<<8))
-#define ace_writew(val, off) {writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off); \
- writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off+1);}
+
+#define ace_readw(off) \
+ ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)) | \
+ (readb(CONFIG_SYS_SYSTEMACE_BASE+off+1)<<8))
+
+#define ace_writew(val, off) \
+ {writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off); \
+ writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off+1);}
#endif
+
#else
-#define ace_readw(off) (in16(CONFIG_SYS_SYSTEMACE_BASE+off))
-#define ace_writew(val, off) (out16(CONFIG_SYS_SYSTEMACE_BASE+off,val))
+
+#define ace_readw(off) (inw(CONFIG_SYS_SYSTEMACE_BASE+off))
+#define ace_writew(val, off) (outw(val, (CONFIG_SYS_SYSTEMACE_BASE+off)))
+
#endif
/* */
@@ -78,15 +88,36 @@
static int get_cf_lock(void)
{
int retry = 10;
+ unsigned val, locked;
- /* CONTROLREG = LOCKREG */
- unsigned val = ace_readw(0x18);
- val |= 0x0002;
- ace_writew((val & 0xffff), 0x18);
+ ace_writew(SYSTEMACE_CCR_RESET, SYSTEMACE_SECT_CNT_CMD_REG);
+ locked = ace_readw(SYSTEMACE_STATUS_REG) & SYSTEMACE_SR_CFGLOCK;
+#if SYSTEMACE_FORCE_LOCK == 1
+ /*
+ * Reset the configuration controller if it has the lock. Per
+ * ASIC designer, this eliminates a potential deadlock if the
+ * FORCELOCK and LOCKREQ bits are both set and the RDYFORCFCMD
+ * is not set.
+ */
+ if(locked)
+ {
+ val = ace_readw(SYSTEMACE_CONTROL_REG);
+ val |= SYSTEMACE_CR_CFGRESET;
+ ace_writew((val & 0xffff), SYSTEMACE_CONTROL_REG);
+ }
+ val = ace_readw(SYSTEMACE_CONTROL_REG);
+ val |= (SYSTEMACE_CR_LOCKREQ | SYSTEMACE_CR_FORCELOCK);
+ ace_writew((val & 0xffff), SYSTEMACE_CONTROL_REG);
+#else
+ if(locked)
+ return -1;
+ val = ace_readw(SYSTEMACE_CONTROL_REG);
+ val |= SYSTEMACE_CR_LOCKREQ;
+ ace_writew((val & 0xffff), SYSTEMACE_CONTROL_REG);
+#endif
/* Wait for MPULOCK in STATUSREG[15:0] */
- while (!(ace_readw(0x04) & 0x0002)) {
-
+ while (!(ace_readw(SYSTEMACE_STATUS_REG) & SYSTEMACE_SR_MPULOCK)) {
if (retry < 0)
return -1;
@@ -99,9 +130,9 @@
static void release_cf_lock(void)
{
- unsigned val = ace_readw(0x18);
- val &= ~(0x0002);
- ace_writew((val & 0xffff), 0x18);
+ unsigned val = ace_readw(SYSTEMACE_CONTROL_REG);
+ val &= ~(SYSTEMACE_CR_LOCKREQ);
+ ace_writew((val & 0xffff), SYSTEMACE_CONTROL_REG);
}
block_dev_desc_t *systemace_get_dev(int dev)
@@ -120,7 +151,7 @@
/*
* Ensure the correct bus mode (8/16 bits) gets enabled
*/
- ace_writew(CONFIG_SYS_SYSTEMACE_WIDTH == 8 ? 0 : 0x0001, 0);
+ ace_writew(CONFIG_SYS_SYSTEMACE_WIDTH == 8 ? 0x0000 : 0x0001, SYSTEMACE_BUS_MODE_REG);
init_part(&systemace_dev);
@@ -143,15 +174,15 @@
unsigned val;
if (get_cf_lock() < 0) {
- unsigned status = ace_readw(0x04);
+ unsigned status = ace_readw(SYSTEMACE_STATUS_REG);
/* If CFDETECT is false, card is missing. */
- if (!(status & 0x0010)) {
+ if (!(status & SYSTEMACE_SR_CARD_DETECT)) {
printf("** CompactFlash card not present. **\n");
return 0;
}
- printf("**** ACE locked away from me (STATUSREG=%04x)\n",
+ printf("**** ACE locked away from me (STATUSREG=0x%04x)\n",
status);
return 0;
}
@@ -161,17 +192,17 @@
retry = 2000;
for (;;) {
- val = ace_readw(0x04);
+ val = ace_readw(SYSTEMACE_STATUS_REG);
/* If CFDETECT is false, card is missing. */
- if (!(val & 0x0010)) {
+ if (!(val & SYSTEMACE_SR_CARD_DETECT)) {
printf("**** ACE CompactFlash not found.\n");
release_cf_lock();
return 0;
}
/* If RDYFORCMD, then we are ready to go. */
- if (val & 0x0100)
+ if (val & SYSTEMACE_SR_RDY_FOR_CMD)
break;
if (retry < 0) {
@@ -199,15 +230,15 @@
printf("... transfer %lu sector in a chunk\n", trans);
#endif
/* Write LBA block address */
- ace_writew((start >> 0) & 0xffff, 0x10);
- ace_writew((start >> 16) & 0x0fff, 0x12);
+ ace_writew((start >> 0) & 0xffff, SYSTEMACE_MPU_LBA_REG_LOW);
+ ace_writew((start >> 16) & 0x0fff, SYSTEMACE_MPU_LBA_REG_HIGH);
/* NOTE: in the Write Sector count below, a count of 0
causes a transfer of 256, so &0xff gives the right
value for whatever transfer count we want. */
/* Write sector count | ReadMemCardData. */
- ace_writew((trans & 0xff) | 0x0300, 0x14);
+ ace_writew((trans & 0xff) | SYSTEMACE_CCR_READ_CMD, SYSTEMACE_SECT_CNT_CMD_REG);
/*
* For FPGA configuration via SystemACE is reset unacceptable
@@ -215,9 +246,9 @@
*/
#ifndef SYSTEMACE_CONFIG_FPGA
/* Reset the configruation controller */
- val = ace_readw(0x18);
- val |= 0x0080;
- ace_writew(val, 0x18);
+ val = ace_readw(SYSTEMACE_CONTROL_REG);
+ val |= SYSTEMACE_CR_CFGRESET;
+ ace_writew(val, SYSTEMACE_CONTROL_REG);
#endif
retry = trans * 16;
@@ -225,13 +256,13 @@
int idx;
/* Wait for buffer to become ready. */
- while (!(ace_readw(0x04) & 0x0020)) {
+ while (!(ace_readw(SYSTEMACE_STATUS_REG) & SYSTEMACE_SR_DATA_BUF_RDY)) {
udelay(100);
}
/* Read 16 words of 2bytes from the sector buffer. */
for (idx = 0; idx < 16; idx += 1) {
- unsigned short val = ace_readw(0x40);
+ unsigned short val = ace_readw(SYSTEMACE_DATA_BUF);
*dp++ = val & 0xff;
*dp++ = (val >> 8) & 0xff;
}
@@ -240,9 +271,9 @@
}
/* Clear the configruation controller reset */
- val = ace_readw(0x18);
- val &= ~0x0080;
- ace_writew(val, 0x18);
+ val = ace_readw(SYSTEMACE_CONTROL_REG);
+ val &= ~SYSTEMACE_CR_CFGRESET;
+ ace_writew(val, SYSTEMACE_CONTROL_REG);
/* Count the blocks we transfer this time. */
start += trans;
diff --git a/examples/stubs.c b/examples/stubs.c
index a8cb954..e0cf75f 100644
--- a/examples/stubs.c
+++ b/examples/stubs.c
@@ -49,6 +49,9 @@
" ldr ip, [r8, %0]\n" \
" ldr pc, [ip, %1]\n" \
: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "ip");
+#elif defined(CONFIG_ARC)
+#define EXPORT_FUNC(x)
+
#elif defined(CONFIG_MIPS)
/*
* k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
diff --git a/include/asm-arc/arc_emac.h b/include/asm-arc/arc_emac.h
new file mode 100644
index 0000000..44fcde2
--- /dev/null
+++ b/include/asm-arc/arc_emac.h
@@ -0,0 +1,179 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/arc_emac.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani(pradeep.sawlani@codito.com)
+ */
+
+
+
+#ifndef __ARC_EMAC_H
+#define __ARC_EMAC_H
+#include <config.h>
+/* Mtu */
+
+#define ETH_MTU 1500
+/* Ethernet frame length */
+#define ETH_FRAME_LEN 1514
+#define ETH_HLEN 14
+
+
+/* Timeout time for tranmission */
+#define TX_TIMEOUT (400*HZ/1000)
+
+/* Buffer descriptors */
+#define TX_BDT_LEN 16 /* Number of recieve BD's */
+#define RX_BDT_LEN 16 /* Number of transmit BD's */
+
+
+/* Size of RX buffers, min = 0 (pointless) max = 2048 (MAX_RX_BUFFER_LEN)
+ * MAC reference manual recommends a value slightly greater than the
+ * maximum size of the packet expected other wise it will chain
+ * a zero size buffer desc if a packet of exactly RX_BUFFER_LEN comes.
+ * VMAC will chain buffers if a packet bigger than this arrives.
+ */
+#define RX_BUFFER_LEN (ETH_FRAME_LEN + 4)
+
+#define MAX_RX_BUFFER_LEN 0x800 /* 2^11 = 2048 = 0x800 */
+#define MAX_TX_BUFFER_LEN 0x800 /* 2^11 = 2048 = 0x800 */
+
+
+/* 14 bytes of ethernet header, 8 bytes pad to prevent buffer chaining
+ * of maximum sized ethernet packets (1514 bytes)
+ */
+#define VMAC_BUFFER_PAD ETH_HLEN + 8
+
+/* VMAC register definitions, offsets in the ref manual are in bytes */
+
+
+#define ID_OFFSET 0x0/0x4
+#define MDIO_DATA_OFFSET 0x34/0x4
+#define ADDRL_OFFSET 0x24/0x4
+#define ADDRH_OFFSET 0x28/0x4
+#define RXRINGPTR_OFFSET 0x20/0x4
+#define TXRINGPTR_OFFSET 0x1c/0x4
+#define POLLRATE_OFFSET 0x10/0x4
+#define ENABLE_OFFSET 0x08/0x4
+#define STAT_OFFSET 0x04/0x4
+#define CONTROL_OFFSET 0x0c/0x4
+#define LAFL_OFFSET 0x2c/0x4
+#define LAFH_OFFSET 0x30/0x4
+
+
+
+/* STATUS and ENABLE Register bit masks */
+#define TXINT_MASK (1<<0) /* Transmit interrupt */
+#define RXINT_MASK (1<<1) /* Recieve interrupt */
+#define ERR_MASK (1<<2) /* Error interrupt */
+#define TXCH_MASK (1<<3) /* Transmit chaining error interrupt */
+#define MSER_MASK (1<<4) /* Missed packet counter error */
+#define RXCR_MASK (1<<8) /* RXCRCERR counter rolled over */
+#define RXFR_MASK (1<<9) /* RXFRAMEERR counter rolled over */
+#define RXFL_MASK (1<<10) /* RXOFLOWERR counter rolled over */
+#define MDIO_MASK (1<<12) /* MDIO complete */
+#define TXPL_MASK (1<<31) /* TXPOLL */
+
+/* CONTROL Register bit masks */
+#define EN_MASK (1<<0) /* VMAC enable */
+#define TXRN_MASK (1<<3) /* TX enable */
+#define RXRN_MASK (1<<4) /* RX enable */
+#define DSBC_MASK (1<<8) /* Disable recieve broadcast */
+#define ENFL_MASK (1<<10) /* Enable Full Duplex */
+#define PROM_MASK (1<<11) /* Promiscuous mode */
+
+/* Buffer descriptor INFO bit masks */
+#define OWN_MASK (1<<31) /* 0-CPU owns buffer, 1-VMAC owns buffer */
+#define FRST_MASK (1<<16) /* First buffer in chain */
+#define LAST_MASK (1<<17) /* Last buffer in chain */
+#define LEN_MASK 0x000007FF /* last 11 bits */
+
+/* ARCangel board PHY Identifier */
+#define PHY_ID 0x3
+
+/* LXT970 register definitions */
+#define LXT970A_CTRL_REG 0x00
+#define LXT970A_STATUS_REG 0x01
+#define LXT970A_AUTONEG_ADV_REG 0x04
+#define LXT970A_AUTONEG_LINK_REG 0x05
+#define LXT970A_MIRROR_REG 0x10
+#define LXT970A_STATUS2_REG 0x11
+
+/* LXT970A control register bit definitions */
+#define LXT970A_CTRL_RESET 0x8000
+#define LXT970A_CTRL_LOOPBACK 0x4000
+#define LXT970A_CTRL_SPEED 0x2000
+#define LXT970A_CTRL_AUTONEG 0x1000
+#define LXT970A_CTRL_DUPLEX 0x0100
+#define LXT970A_CTRL_RESTART_AUTO 0x0200
+#define LXT970A_CTRL_COLL 0x0080
+#define LXT970A_CTRL_DUPLEX_MODE 0x0100
+
+/* Auto-negatiation advertisement register bit definitions */
+#define LXT970A_AUTONEG_ADV_100BTX_FULL 0x100
+#define LXT970A_AUTONEG_ADV_100BTX 0x80
+#define LXT970A_AUTONEG_ADV_10BTX_FULL 0x40
+#define LXT970A_AUTONEG_ADV_10BT 0x20
+#define AUTONEG_ADV_IEEE_8023 0x1
+
+/* Auto-negatiation Link register bit definitions */
+#define LXT970A_AUTONEG_LINK_100BTX_FULL 0x100
+#define LXT970A_AUTONEG_LINK_100BTX 0x80
+#define LXT970A_AUTONEG_LINK_10BTX_FULL 0x40
+
+/* Status register bit definitions */
+#define LXT970A_STATUS_COMPLETE 0x20
+#define LXT970A_STATUS_AUTONEG_ABLE 0x04
+#define LXT970A_STATUS2_COMPLETE 0x80
+
+/* Status2 register bit definitions */
+#define LXT970A_STATUS2_POLARITY 0x20
+#define LXT970A_STATUS2_FULL 0x200
+#define LXT970A_STATUS2_LINK_UP 0x400
+#define LXT970A_STATUS2_100 0x4000
+
+
+//#define ARCTANGENT_EMAC_SETUP
+//#define ARCTANGENT_EMAC_DEBUG
+
+
+#define __mdio_write(stat_reg,mdio_data_reg, phy_id, phy_reg, val) do { \
+ *(mdio_data_reg) = (0x50020000 | phy_id << 23 | \
+ phy_reg << 18 | (val & 0xffff)) ; \
+ while (!(*(stat_reg) & MDIO_MASK)); \
+ *stat_reg = MDIO_MASK;\
+ }while(0)
+
+#define __mdio_read(stat_reg, mdio_data_reg, phy_id, phy_reg, val) do { \
+ *(mdio_data_reg) = (0x60020000 | phy_id << 23 | phy_reg << 18 );\
+ while (! ((*stat_reg) & MDIO_MASK) );\
+ *stat_reg = MDIO_MASK; \
+ val = *(mdio_data_reg) & 0xffff; \
+ }while(0)
+
+
+#define arc_read_uncached_32(ptr) \
+({ \
+ unsigned int __ret; \
+ __asm__ __volatile__ ("ld.di %0, [%1]":"=r"(__ret):"r"(ptr)); \
+ __ret; \
+})
+
+#define arc_write_uncached_32(ptr, data) \
+({ \
+ __asm__ __volatile__ ("st.di %0, [%1]"::"r"(data), "r"(ptr)); \
+})
+
+
+struct aa3_buffer_desc {
+ unsigned int info;
+ void *data;
+};
+#endif /* __ARC_EMAC_H */
diff --git a/include/asm-arc/arc_pgu.h b/include/asm-arc/arc_pgu.h
new file mode 100755
index 0000000..e416ab1
--- /dev/null
+++ b/include/asm-arc/arc_pgu.h
@@ -0,0 +1,355 @@
+/*
+ * arc_pgu.h - Register definitions for the ARC pixel graphics unit.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Copyright 2005 (C) ARC International (www.arc.com).
+ *
+ */
+
+#ifndef _ASM_ARC_PGU_H
+#define _ASM_ARC_PGU_H
+
+
+/*--------------------------------------------------------------------------------------------*/
+
+/* Ioctl selectors FIXME - make sure these are unique within the fb subsystem */
+#define ARCPGUFB_GETYUV 0xffff0001
+#define ARCPGUFB_SETYUV 0xffff0002
+#define ARCPGUFB_FILLYUV 0xffff0003
+#define ARCPGUFB_SWITCH_YUV 0xffff0004
+#define ARCPGUFB_BKLGHT_OFF 0xffff0005
+#define ARCPGUFB_BKLGHT_ON 0xffff0006
+#define ARCPGUFB_START_DISPLAY 0xffff0007
+#define ARCPGUFB_STOP_DISPLAY 0xffff0008
+#define ARCPGUFB_GET_PGU_STATE 0xffff0009
+#define ARCPGUFB_SET_PGU_STATE 0xffff000a
+#define ARCPGUFB_GET_MAIN_MODE 0xffff000b
+#define ARCPGUFB_SET_MAIN_MODE 0xffff000c
+#define ARCPGUFB_SET_RGB_BUF 0xffff000d
+#define ARCPGUFB_GET_RGB_BUF 0xffff000e
+#define ARCPGUFB_GET_FB_MAIN 0xffff000f
+#define ARCPGUFB_CHECKPOINT 0xffff0010
+#define ARCPGUFB_RESTORE 0xffff0011
+#define ARCPGUFB_RESET 0xffff0012
+#define ARCPGUFB_SET_YUV_RES 0xffff0013
+#define ARCPGUFB_GET_FB_INFO 0xffff0014
+#define ARCPGUFB_SET_OL_MODE 0xffff0015
+#define ARCPGUFB_GET_OL_MODE 0xffff0016
+#define ARCPGUFB_GET_OL_COLKEY 0xffff0017
+#define ARCPGUFB_SET_OL_COLKEY 0xffff0018
+#define ARCPGUFB_GET_OL_START 0xffff0019
+#define ARCPGUFB_SET_OL_START 0xffff001a
+#define ARCPGUFB_GET_OL_END 0xffff001b
+#define ARCPGUFB_SET_OL_END 0xffff001c
+#define ARCPGUFB_SET_OL_OFFSET 0xffff001d
+#define ARCPGUFB_GET_YUV_BASE 0xffff002c /* return address of yuv buffer n */
+
+#ifdef CONFIG_ENABLE_CENTERING
+#define ARCPGUFB_GET_ORIGIN 0xffff001e
+#define ARCPGUFB_SET_ORIGIN 0xffff001f
+#endif
+
+#define ARCPGUFB_ALLOC 0xffff0020
+#define ARCPGUFB_FREE 0xffff0021
+#define ARCPGUFB_SEND 0xffff0022
+#define ARCPGUFB_FRAMERATE_SET 0xffff0023
+#define ARCPGUFB_QUEUE_LEN_GET 0xffff0024
+#define ARCPGUFB_FLUSH 0xffff0025
+#define ARCPGUFB_FRAME_DROP 0xffff0026
+#define ARCPGUFB_PAUSE 0xffff0027
+#define ARCPGUFB_RESUME 0xffff0028
+#define ARCPGUFB_RESET_SYNC 0xffff0029
+#define ARCPGUFB_NUM_FREE_BUFS 0xffff002a
+#define ARCPGUFB_PAUSE_MS 0xffff002b
+
+#define ARCPGUFB_GET_STATCTRL 0xffff00fe
+#define ARCPGUFB_SET_STATCTRL 0xffff00ff
+
+/*--------------------------------------------------------------------------------------------*/
+
+/* YUV buffer layout - all sizes and offsets in bytes. Note that base addresses tend to be
+ passed around as unsigned longs, in which case you'll need to typecast before applying
+ any offsets. */
+
+struct yuv_info {
+ unsigned int displayed_buffer;
+ unsigned long phys_base;
+ unsigned long virt_base;
+ unsigned long yuv_size;
+ unsigned long alignment;
+ unsigned long num_buffers;
+ unsigned long start_offset;
+ unsigned long width;
+ unsigned long height;
+ unsigned long u_offset;
+ unsigned long v_offset;
+ unsigned long y_stride;
+ unsigned long u_stride;
+ unsigned long v_stride;
+#ifdef CONFIG_ARC_PGU_CROPPING
+ unsigned long cropped_width;
+ unsigned long cropped_height;
+ unsigned long x_offset;
+ unsigned long y_offset;
+#endif
+};
+
+/*--------------------------------------------------------------------------------------------*/
+
+/* Register definitions */
+
+/* Base+0x00 PGU_MODULE_ID Register containing read only module ID and
+ * Revision numbers */
+#define PGU_MODULE_ID_OFFSET 0x0
+#define PGU_DISPLAY_TYPE_MASK 0x1000000
+#define PGU_VERSION_MASK 0xff0000
+#define PGU_VERSION_SHIFT 16
+
+/* Base+0x08 CLK_CFG_REG Clock Configuration register. It is used to
+ * Define the clock divider value, and the
+ * pulse width (high cycle) in clock cycles:
+ * [ 7: 0] CLK_DIV : clock divider value - 1
+ * [23:16] CLK_HIGH : High pulse width - 1 */
+#define CLK_CFG_REG_OFFSET 0x8
+#define CLK_CFG_REG_CLK_DIV_MASK 0xff
+#define CLK_CFG_REG_CLK_HIGH_MASK 0xff0000
+#define GET_CLK_CFG_REG_CLK_HIGH_VAL(x) (x & CLK_CFG_REG_CLK_HIGH_MASK) >> 16
+#define SET_CLK_CFG_REG_CLK_HIGH_VAL(x, y) (x & !CLK_CFG_REG_CLK_HIGH_MASK) | ((y << 16) & CLK_CFG_REG_CLK_HIGH_MASK)
+
+/* Base+0x10 DISP_DIM_REG Display Dimensions register. This specify
+ * the dimensions of the actual display.
+ * [10: 0] PGU_X_RES : X dimension - 1
+ * [26:16] PGU_Y_RES : Y dimension - 1 */
+
+#define DISP_DIM_REG_OFFSET 0x10
+#define DISP_DIM_REG_PGU_X_RES_MASK 0x3ff
+#define DISP_DIM_REG_PGU_Y_RES_MASK 0x3ff0000
+#define DISP_DIM_Y_SHIFT 16
+#define ENCODE_PGU_DIMS(x,y) ((x & DISP_DIM_REG_PGU_X_RES_MASK) | ((y & DISP_DIM_REG_PGU_X_RES_MASK) * 0x10000))
+
+/* Base+0x18 HSYNC_CFG_REG Hsync Configuration register. This is used
+ * to specify various hsync related timings in
+ * clock cycles:
+ * [11: 0] HSYNC_CYC : Hsync period - 1
+ * [23:16] H_BCK_PORTH : Back porth width - 1
+ * [31:23] HSYNC_WIDTH : Hsync low width - 1 */
+
+#define PGU_SYNC_REGS_CYC_MASK 0xfff
+#define PGU_SYNC_REGS_PORCH_MASK 0xff0000
+#define PGU_SYNC_REGS_WIDTH_MASK 0xff000000
+#define PGU_SYNC_REGS_PORCH_OFFSET 16
+#define PGU_SYNC_REGS_WIDTH_OFFSET 24
+
+#define HSYNC_CFG_REG_OFFSET 0x18
+
+/* Base+0x20 VSYNC_CFG_REG Vsync Configuration register. This is used
+ * to specify various Vsync related timings in
+ * Hsync cycles:
+ * [11: 0] VSYNC_CYC : Vsync period - 1
+ * [23:16] V_BCK_PORTH : Back porth width - 1
+ * [31:23] VSYNC_WIDTH : Hsync low width */
+
+#define VSYNC_CFG_REG_OFFSET 0x20
+
+/* Base+0x28 FRMSTART_REG Frame Start Address. This 32 bit address
+ * specifies the start of the display frame
+ * in memory. Must be at least 2 byte aligned
+ * for 16 bit per pixel format. */
+
+#define FRMSTART_REG_OFFSET 0x28
+
+/* Base+0x30 STRIDE_REG Line Stride Address. This 32 bit address
+ * specifies the different in address between
+ * the first pixels of adjecent display lines
+ * in memory. Must be at least 2 byte aligned
+ * for 16 bit per pixel format. */
+
+#define STRIDE_REG_OFFSET 0x30
+
+/* Base+0x38 FRM_DIM_REG Frame Dimension register. This register
+ * defines the frame size of the display in
+ * memory and can be smaller than the display.
+ * [10:0] FRM_WTH : frame line width in
+ * pixels. Must be <=
+ * PGU_X_RES without x2 mode
+ * or <= PGU_X_RES/2 in x2
+ * mode.
+ * [26:16] FRM_LNS : frame number of lines
+ * Must be <= PGU_X_RES
+ * without x2 mode or <=
+ * PGU_X_RES/2 in x2 mode. */
+
+#define FRM_DIM_REG_OFFSET 0x38
+#define FRM_DIM_REG_FRM_WTH_MASK 0x7ff
+#define FRM_DIM_REG_FRM_LNS_MASK 0x7ff
+
+/*
+ * Base+0x40 STATCTRL_REG Status and Control register. This register
+ * is used to control the display module and
+ * monitor its status: */
+#define STATCTRL_REG_OFFSET 0x40
+/* [0] DISP_EN : Display enable bit. When
+ * set to high, starts the
+ * display. It then clears
+ * after a few cycles, if
+ * the CONT bit is not set,
+ * hence allowing the display
+ * to do the frame once. */
+#define STATCTRL_REG_DISP_EN_MASK 1
+/* [1] INTR_EN : Interrupt Enable. Active
+ * high. */
+#define STATCTRL_INTR_EN_MASK 2
+/* [2] INTR_CLR : Interrupt Clear. Set to
+ * high to clear the interrupt
+ * flag/request. Always reads
+ * as zeros */
+#define STATCTRL_INTR_CLR_MASK 4
+/* [3] CONT : Continuous mode. When set,
+ * will not allow the DISP_EN
+ * bit to be cleared by itself
+ * and as long as DISP_EN is
+ * not cleared manually, the
+ * Dispaly will drive the PGU
+ * continuously, frame after
+ * frame. */
+#define STATCTRL_CONT_B_MASK 8
+/* [5:4] PIX_FMT Pixel Format. Select the
+ * pixel format:
+ * "00" - RGB555
+ * "01" - YUV420 (aka YV12)
+ * "10" - reserved
+ * "11" - reserved */
+#define STATCTRL_PIX_FMT_MASK 0x30
+#define STATCTRL_PIX_FMT_OFFSET 4
+#define STATCTRL_PIX_FMT_RGB555 0
+#define STATCTRL_PIX_FMT_YUV420 0x10
+/* [6] BACKLIGHT Active high backlight
+ * enable. When set to high,
+ * sets the back light control
+ * signal to high to turn on
+ * the backlight of the PGU. */
+#define STATCTRL_BACKLIGHT_MASK 0x40
+/* [7] X2 Zoom 2 mode. when set,
+ * every pixel in the frame is
+ * display twice in a line &
+ * the line is displayed twice
+ * therefore enlarging the
+ * picture. */
+#define STATCTRL_X2_MASK 0x80
+/* [8] REV_LN_SCAN Reverse line scan. When set
+ * the display displays the
+ * last line first, back
+ * towards the first */
+#define STATCTRL_REV_LN_SCAN_MASK 0x100
+/* [9] HPOL HSync signal polarity */
+#define STATCTRL_HPOL_MASK 0x200
+/* [10] VPOL VSync signal polarity */
+#define STATCTRL_VPOL_MASK 0x400
+/* [11] DPOL Data enable signal polarity */
+#define STATCTRL_DPOL_MASK 0x800
+/* [12] OL_EN Overlay enable */
+#define STATCTRL_OL_EN_MASK 0x1000
+/* [13-15] OL_FMT Overlay format:
+ * "00" - RGBA4444
+ * "01" - RGBA5551
+ * "10" - RGB555 with colour keying */
+#define STATCTRL_OL_FMT_MASK 0x6000
+#define STATCTRL_OL_FMT_OFFSET 13
+#define STATCTRL_OL_FMT_RGBA4444 0
+#define STATCTRL_OL_FMT_RGBA5551 0x2000
+#define STATCTRL_OL_FMT_RGB555 0x4000
+/* [16] DISP_BUSY Display Busy status. Active
+ * High. When set indicates
+ * that the display is
+ * currently scanning out
+ * pixel data, or generating
+ * syncs for the current
+ * display */
+#define STATCTRL_DISP_BUSY_MASK 0x10000
+/* [17] BU_BUSY Burst Unit busy. Active
+ * high. When set indicates
+ * that the burst unit is
+ * busy fetching pixel data. */
+#define STATCTRL_BU_BUSY_MASK 0x20000
+/* [18] INTR_FLG Interrupt flag. Refelects
+ * the interrupt signal.
+ * Active low level interrupt. */
+#define STATCTRL_INTR_FLAG 0x40000
+/* [19-20] IL_MD Interface mode select
+ * "00" - Non-interlaced
+ * "01" - Frame mode interlace
+ * "10" - Even field interlace
+ * "11" - Odd field interlace */
+#define STATCTRL_IL_MODE_MASK 0x180000
+#define STATCTRL_IL_NONE 0
+#define STATCTRL_IL_FRAME 0x80000
+#define STATCTRL_IL_EVEN 0x100000
+#define STATCTRL_IL_ODD 0x180000
+
+/*--------------------------------------------------------------------------------------------*/
+
+typedef volatile struct {
+ volatile unsigned long pgu_id; /* Identity register */
+ volatile unsigned long padding1;
+ volatile unsigned long clk_cfg; /* Clock control */
+ volatile unsigned long padding2;
+ volatile unsigned long disp_dim; /* Display dimension */
+ volatile unsigned long padding3;
+ volatile unsigned long hsync_cfg; /* HSYNC */
+ volatile unsigned long padding4;
+ volatile unsigned long vsync_cfg; /* VSYNC */
+ volatile unsigned long padding5;
+ volatile unsigned long frm_start; /* Frame start */
+ volatile unsigned long padding6;
+ volatile unsigned long stride; /* Frame stride */
+ volatile unsigned long padding7;
+ volatile unsigned long frm_dim; /* Frame dimension */
+ volatile unsigned long padding8;
+ volatile unsigned long statctrl; /* Status and control */
+ volatile unsigned long padding9;
+ volatile unsigned long cru_frm_st; /* Chroma U frame start */
+ volatile unsigned long padding10;
+ volatile unsigned long cru_stride; /* Chroma U stride */
+ volatile unsigned long padding11;
+ volatile unsigned long crv_frm_st; /* Chroma V frame start */
+ volatile unsigned long padding12;
+ volatile unsigned long crv_stride; /* Chroma V stride */
+
+#ifdef CONFIG_ENABLE_ARCPGU_OVERLAY
+ volatile unsigned long padding13;
+ volatile unsigned long ol_frm_st; /* Overlay frame start */
+ volatile unsigned long padding14;
+ volatile unsigned long ol_stride; /* Overlay stride */
+ volatile unsigned long padding15;
+ volatile unsigned long ol_scn_line; /* Overlay start and end line numbers */
+ volatile unsigned long padding16;
+ volatile unsigned long ol_col_key; /* Overlay transparency colour key - RGB 555 */
+#endif
+
+#ifdef CONFIG_ENABLE_CENTERING
+ volatile unsigned long padding17;
+ volatile unsigned long centreoffsets; /* X, Y offsets for centering */
+#endif
+} arc_pgu;
+
+/*--------------------------------------------------------------------------------------------*/
+
+#endif /* _ASM_ARC_PGU_H */
diff --git a/include/asm-arc/arcregs.h b/include/asm-arc/arcregs.h
new file mode 100644
index 0000000..51c6c0d
--- /dev/null
+++ b/include/asm-arc/arcregs.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/arcregs.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors: Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ * Auxiliary register definitions and macros to read and write to them.
+ */
+
+#ifndef _ASM_ARC_ARCDEFS_H
+#define _ASM_ARC_ARCDEFS_H
+
+/* These masks correspond to the status word(STATUS_32) bits */
+#define STATUS_H_SET 0x01 /* Mask for Halt bit */
+#define STATUS_E1_MASK 0x02 /* Mask for Interrupt 1 enable */
+#define STATUS_E2_MASK 0x04 /* Mask for Interrupt 2 enable */
+#define STATUS_DISABLE_INTERRUPTS 0xFFFFFFF9 /* Mask to disable Interrupts */
+
+
+/* Auxiliary register values */
+#define ARC_REG_STATUS32 0x00A /* status 32 register */
+#define ARC_REG_TIMER0_CNT 0x021 /* timer 0 count */
+#define ARC_REG_TIMER0_CTRL 0x022 /* timer 0 control */
+#define ARC_REG_TIMER0_LIMIT 0x023 /* timer 0 limit */
+#define ARC_REG_INT_VEC_BASE 0x025 /* interrupt vector base
+ * address */
+#define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
+#define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */
+#define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
+
+/* Instruction cache related Auxiliary registers */
+#define ARC_REG_I_CACHE_BUILD_REG 0x77
+#define ARC_REG_IC_IVIC 0x10
+#define ARC_REG_IC_CTRL 0x11
+#define ARC_REG_IC_IVIL 0x19
+/* Data cache related Auxiliary registers */
+#define ARC_REG_D_CACHE_BUILD_REG 0x72
+#define ARC_REG_DC_IVDC 0x47
+#define ARC_REG_DC_CTRL 0x48
+#define ARC_REG_DC_IVDL 0x4A
+#define ARC_REG_DC_FLSH 0x4B
+#define ARC_REG_DC_FLDL 0x4C
+
+#define IM_SET_DC_CTRL 0x40
+
+
+/* Inline macros for reading, writing into auxiliary registers */
+
+#ifndef __ASSEMBLY__
+/* Read an auxiliary register */
+#define read_new_aux_reg(reg) \
+ ({ unsigned int __ret; \
+ __asm__ __volatile__("lr %0, [%1]":"=r"(__ret):"i"(reg));\
+ __ret; \
+ })
+
+/* Write to an auxiliary register */
+
+#define write_new_aux_reg(reg, val) \
+ ({ \
+ __asm__ __volatile__ ("sr %0, [%1]"::"r"(val),"i"(reg)); \
+ })
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_ARC_ARCDEFS_H */
diff --git a/include/asm-arc/atomic.h b/include/asm-arc/atomic.h
new file mode 100644
index 0000000..551fc2d
--- /dev/null
+++ b/include/asm-arc/atomic.h
@@ -0,0 +1,140 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * Copyright (C)
+ *
+ * include/asm-arc/atomic.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef _ASM_ARC_ATOMIC_H
+#define _ASM_ARC_ATOMIC_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_SMP
+#error SMP not supported
+#endif
+
+typedef struct { int counter; } atomic_t;
+
+#define ATOMIC_INIT(i) { (i) }
+
+#ifdef __KERNEL__
+#include <asm/system.h>
+
+/* FIXME :: not atomic on load store architecture ?
+ * i think it wont matter. */
+#define atomic_read(v) ((v)->counter)
+#define atomic_set(v,i) (((v)->counter) = (i))
+
+static __inline__ void atomic_add(int i, volatile atomic_t *v)
+{
+ unsigned long flags;
+
+ __save_flags_cli(flags);
+ v->counter += i;
+ __restore_flags(flags);
+}
+
+static __inline__ void atomic_sub(int i, volatile atomic_t *v)
+{
+ unsigned long flags;
+
+ __save_flags_cli(flags);
+ v->counter -= i;
+ __restore_flags(flags);
+}
+
+static __inline__ int atomic_add_return(int i, volatile atomic_t *v)
+{
+ unsigned long flags ;
+ long temp;
+
+ __save_flags_cli(flags);
+ v->counter += i;
+ temp = v->counter;
+ __restore_flags(flags);
+
+ return temp;
+}
+
+static __inline__ int atomic_sub_return(int i, volatile atomic_t *v)
+{
+ unsigned long flags;
+ long temp;
+
+ __save_flags_cli(flags);
+ v->counter -= i;
+ temp = v->counter;
+ __restore_flags(flags);
+
+ return temp;
+}
+
+static __inline__ void atomic_inc(volatile atomic_t *v)
+{
+ unsigned long flags;
+
+ __save_flags_cli(flags);
+ v->counter += 1;
+ __restore_flags(flags);
+}
+
+static __inline__ void atomic_dec(volatile atomic_t *v)
+{
+ unsigned long flags;
+
+ __save_flags_cli(flags);
+ v->counter -= 1;
+ __restore_flags(flags);
+}
+
+static __inline__ int atomic_dec_and_test(volatile atomic_t *v)
+{
+ unsigned long flags;
+ int result;
+
+ __save_flags_cli(flags);
+ v->counter -= 1;
+ result = (v->counter == 0);
+ __restore_flags(flags);
+
+ return result;
+}
+
+extern __inline__ int atomic_add_negative(int i, volatile atomic_t *v)
+{
+ unsigned long flags;
+ int result;
+
+ __save_flags_cli(flags);
+ v->counter += i;
+ result = (v->counter < 0);
+ __restore_flags(flags);
+
+ return result;
+}
+
+static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *addr)
+{
+ unsigned long flags;
+
+ __save_flags_cli(flags);
+ *addr &= ~mask;
+ __restore_flags(flags);
+}
+
+#define atomic_dec_return(v) atomic_sub_return(1, (v))
+#define atomic_inc_return(v) atomic_add_return(1, (v))
+
+#define smp_mb__before_atomic_dec() barrier()
+#define smp_mb__after_atomic_dec() barrier()
+#define smp_mb__before_atomic_inc() barrier()
+#define smp_mb__after_atomic_inc() barrier()
+
+#endif
+#endif
diff --git a/include/asm-arc/bitops.h b/include/asm-arc/bitops.h
new file mode 100644
index 0000000..99e49c4
--- /dev/null
+++ b/include/asm-arc/bitops.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/bitops.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
diff --git a/include/asm-arc/byteorder.h b/include/asm-arc/byteorder.h
new file mode 100644
index 0000000..eb24d8e
--- /dev/null
+++ b/include/asm-arc/byteorder.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * Copyright (C)
+ *
+ * include/asm-arc/byteorder.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_ARC_BYTEORDER_H
+#define __ASM_ARC_BYTEORDER_H
+
+
+#include <asm/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+# define __BYTEORDER_HAS_U64__
+# define __SWAB_64_THRU_32__
+#endif
+
+#ifndef __big_endian__
+//#define __LITTLE_ENDIAN__
+#define LITTLE_ENDIAN
+#include <linux/byteorder/little_endian.h>
+#else
+#define __BIG_ENDIAN__
+#define BIG_ENDIAN
+#include <linux/byteorder/big_endian.h>
+#endif /* __big_endian__ */
+
+
+#endif /* ASM_ARC_BYTEORDER_H */
+
diff --git a/include/asm-arc/config.h b/include/asm-arc/config.h
new file mode 100644
index 0000000..049c44e
--- /dev/null
+++ b/include/asm-arc/config.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef _ASM_CONFIG_H_
+#define _ASM_CONFIG_H_
+
+#endif
diff --git a/include/asm-arc/debug.h b/include/asm-arc/debug.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/include/asm-arc/debug.h
diff --git a/include/asm-arc/errno.h b/include/asm-arc/errno.h
new file mode 100644
index 0000000..81ffb4f
--- /dev/null
+++ b/include/asm-arc/errno.h
@@ -0,0 +1,145 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * Copyright (C)
+ *
+ * include/asm-arc/errno.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _ASM_ARC_ERRNO_H
+#define _ASM_ARC_ERRNO_H
+
+#define EPERM 1 /* Operation not permitted */
+#define ENOENT 2 /* No such file or directory */
+#define ESRCH 3 /* No such process */
+#define EINTR 4 /* Interrupted system call */
+#define EIO 5 /* I/O error */
+#define ENXIO 6 /* No such device or address */
+#define E2BIG 7 /* Arg list too long */
+#define ENOEXEC 8 /* Exec format error */
+#define EBADF 9 /* Bad file number */
+#define ECHILD 10 /* No child processes */
+#define EAGAIN 11 /* Try again */
+#define ENOMEM 12 /* Out of memory */
+#define EACCES 13 /* Permission denied */
+#define EFAULT 14 /* Bad address */
+#define ENOTBLK 15 /* Block device required */
+#define EBUSY 16 /* Device or resource busy */
+#define EEXIST 17 /* File exists */
+#define EXDEV 18 /* Cross-device link */
+#define ENODEV 19 /* No such device */
+#define ENOTDIR 20 /* Not a directory */
+#define EISDIR 21 /* Is a directory */
+#define EINVAL 22 /* Invalid argument */
+#define ENFILE 23 /* File table overflow */
+#define EMFILE 24 /* Too many open files */
+#define ENOTTY 25 /* Not a typewriter */
+#define ETXTBSY 26 /* Text file busy */
+#define EFBIG 27 /* File too large */
+#define ENOSPC 28 /* No space left on device */
+#define ESPIPE 29 /* Illegal seek */
+#define EROFS 30 /* Read-only file system */
+#define EMLINK 31 /* Too many links */
+#define EPIPE 32 /* Broken pipe */
+#define EDOM 33 /* Math argument out of domain of func */
+#define ERANGE 34 /* Math result not representable */
+#define EDEADLK 35 /* Resource deadlock would occur */
+#define ENAMETOOLONG 36 /* File name too long */
+#define ENOLCK 37 /* No record locks available */
+#define ENOSYS 38 /* Function not implemented */
+#define ENOTEMPTY 39 /* Directory not empty */
+#define ELOOP 40 /* Too many symbolic links encountered */
+#define EWOULDBLOCK EAGAIN /* Operation would block */
+#define ENOMSG 42 /* No message of desired type */
+#define EIDRM 43 /* Identifier removed */
+#define ECHRNG 44 /* Channel number out of range */
+#define EL2NSYNC 45 /* Level 2 not synchronized */
+#define EL3HLT 46 /* Level 3 halted */
+#define EL3RST 47 /* Level 3 reset */
+#define ELNRNG 48 /* Link number out of range */
+#define EUNATCH 49 /* Protocol driver not attached */
+#define ENOCSI 50 /* No CSI structure available */
+#define EL2HLT 51 /* Level 2 halted */
+#define EBADE 52 /* Invalid exchange */
+#define EBADR 53 /* Invalid request descriptor */
+#define EXFULL 54 /* Exchange full */
+#define ENOANO 55 /* No anode */
+#define EBADRQC 56 /* Invalid request code */
+#define EBADSLT 57 /* Invalid slot */
+
+#define EDEADLOCK EDEADLK
+
+#define EBFONT 59 /* Bad font file format */
+#define ENOSTR 60 /* Device not a stream */
+#define ENODATA 61 /* No data available */
+#define ETIME 62 /* Timer expired */
+#define ENOSR 63 /* Out of streams resources */
+#define ENONET 64 /* Machine is not on the network */
+#define ENOPKG 65 /* Package not installed */
+#define EREMOTE 66 /* Object is remote */
+#define ENOLINK 67 /* Link has been severed */
+#define EADV 68 /* Advertise error */
+#define ESRMNT 69 /* Srmount error */
+#define ECOMM 70 /* Communication error on send */
+#define EPROTO 71 /* Protocol error */
+#define EMULTIHOP 72 /* Multihop attempted */
+#define EDOTDOT 73 /* RFS specific error */
+#define EBADMSG 74 /* Not a data message */
+#define EOVERFLOW 75 /* Value too large for defined data type */
+#define ENOTUNIQ 76 /* Name not unique on network */
+#define EBADFD 77 /* File descriptor in bad state */
+#define EREMCHG 78 /* Remote address changed */
+#define ELIBACC 79 /* Can not access a needed shared library */
+#define ELIBBAD 80 /* Accessing a corrupted shared library */
+#define ELIBSCN 81 /* .lib section in a.out corrupted */
+#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
+#define ELIBEXEC 83 /* Cannot exec a shared library directly */
+#define EILSEQ 84 /* Illegal byte sequence */
+#define ERESTART 85 /* Interrupted system call should be restarted */
+#define ESTRPIPE 86 /* Streams pipe error */
+#define EUSERS 87 /* Too many users */
+#define ENOTSOCK 88 /* Socket operation on non-socket */
+#define EDESTADDRREQ 89 /* Destination address required */
+#define EMSGSIZE 90 /* Message too long */
+#define EPROTOTYPE 91 /* Protocol wrong type for socket */
+#define ENOPROTOOPT 92 /* Protocol not available */
+#define EPROTONOSUPPORT 93 /* Protocol not supported */
+#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
+#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
+#define EPFNOSUPPORT 96 /* Protocol family not supported */
+#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
+#define EADDRINUSE 98 /* Address already in use */
+#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
+#define ENETDOWN 100 /* Network is down */
+#define ENETUNREACH 101 /* Network is unreachable */
+#define ENETRESET 102 /* Network dropped connection because of reset */
+#define ECONNABORTED 103 /* Software caused connection abort */
+#define ECONNRESET 104 /* Connection reset by peer */
+#define ENOBUFS 105 /* No buffer space available */
+#define EISCONN 106 /* Transport endpoint is already connected */
+#define ENOTCONN 107 /* Transport endpoint is not connected */
+#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
+#define ETOOMANYREFS 109 /* Too many references: cannot splice */
+#define ETIMEDOUT 110 /* Connection timed out */
+#define ECONNREFUSED 111 /* Connection refused */
+#define EHOSTDOWN 112 /* Host is down */
+#define EHOSTUNREACH 113 /* No route to host */
+#define EALREADY 114 /* Operation already in progress */
+#define EINPROGRESS 115 /* Operation now in progress */
+#define ESTALE 116 /* Stale NFS file handle */
+#define EUCLEAN 117 /* Structure needs cleaning */
+#define ENOTNAM 118 /* Not a XENIX named type file */
+#define ENAVAIL 119 /* No XENIX semaphores available */
+#define EISNAM 120 /* Is a named type file */
+#define EREMOTEIO 121 /* Remote I/O error */
+#define EDQUOT 122 /* Quota exceeded */
+
+#define ENOMEDIUM 123 /* No medium found */
+#define EMEDIUMTYPE 124 /* Wrong medium type */
+
+#endif /* _ASM_ARC_ERRNO_H */
diff --git a/include/asm-arc/global_data.h b/include/asm-arc/global_data.h
new file mode 100644
index 0000000..cc61df1
--- /dev/null
+++ b/include/asm-arc/global_data.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/global_data.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#ifndef __ASM_GBL_DATA_H
+#define __ASM_GBL_DATA_H
+#include<asm/u-boot.h>
+
+typedef struct {
+ bd_t *bd;
+ unsigned long flags;
+
+ unsigned long baudrate;
+ unsigned long have_console; /* serial_init() was called */
+
+ unsigned long reloc_off; /* Relocation Offset */
+
+ unsigned long env_addr; /* Address of Environment struct */
+ unsigned long env_valid; /* Checksum of Environment valid? */
+ unsigned long cpu_clk; /* CPU clock in Hz! */
+ unsigned long fb_base; /* base address of frame buffer */
+#ifdef CONFIG_VFD
+ unsigned char vfd_type; /* display type */
+#endif
+#if 0
+ unsigned long bus_clk;
+ unsigned long ram_size; /* RAM size */
+ unsigned long reset_status; /* reset status register at boot */
+#endif
+ void **jt; /* jump table */
+} gd_t;
+extern gd_t *global_data;
+
+/*
+ * Global Data Flags
+ */
+#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
+#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
+#define GD_FLG_SILENT 0x00004 /* Silent mode */
+
+#define DECLARE_GLOBAL_DATA_PTR extern gd_t *gd /* defined in lib_arc/board.c */
+
+#endif /* __ASM_GBL_DATA_H */
diff --git a/include/asm-arc/io.h b/include/asm-arc/io.h
new file mode 100644
index 0000000..afa310b
--- /dev/null
+++ b/include/asm-arc/io.h
@@ -0,0 +1,189 @@
+/******************************************************************************
+ * Copyright Codito Technologies (www.codito.com) Oct 01, 2004
+ *
+ * Additional contributions by ARC International, 2005.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *****************************************************************************/
+
+/*
+ * linux/include/asm-arc/io.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Amit Bhor
+ */
+
+#ifndef _ASM_ARC_IO_H
+#define _ASM_ARC_IO_H
+
+#define __raw_readb(addr) (*(volatile unsigned char *)(addr))
+#define __raw_readw(addr) (*(volatile unsigned short *)(addr))
+#define __raw_readl(addr) (*(volatile unsigned int *)(addr))
+
+#define __raw_writeb(b,addr) ((*(volatile unsigned char *)(addr)) = (b))
+#define __raw_writew(w,addr) ((*(volatile unsigned short *)(addr)) = (w))
+#define __raw_writel(l,addr) ((*(volatile unsigned int *)(addr)) = (l))
+
+/* These can't be used, because they don't make any sense like this - PS */
+#define memset_io(a,b,c) memset((void *)(a),(b),(c))
+#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
+#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
+
+#define __io(a) (a)
+#define __mem_pci(a) ((unsigned long)(a))
+#define __mem_isa(a) ((unsigned long)(a))
+
+static inline int __raw_readsb(unsigned int addr, void *data, int bytelen) {
+ __asm__ __volatile__ ("1:ld.di r8,[r0];\n"
+ "sub.f r2,r2,1;\n"
+ "bnz.d 1b;\n"
+ "stb.ab r8,[r1,1];\n"
+ :
+ : "r" (addr), "r" (data), "r" (bytelen)
+ : "r8" );
+ return bytelen;
+}
+
+static inline int __raw_readsw(unsigned int addr, void *data, int wordlen) {
+ __asm__ __volatile__ ("1:ld.di r8,[r0];\n"
+ "sub.f r2,r2,1;\n"
+ "bnz.d 1b;\n"
+ "stw.ab r8,[r1,2];\n"
+ :
+ : "r" (addr), "r" (data), "r" (wordlen)
+ : "r8" );
+ return wordlen;
+}
+
+static inline int __raw_readsl(unsigned int addr, void *data, int longlen) {
+ __asm__ __volatile__ ("1:ld.di r8,[r0];\n"
+ "sub.f r2,r2,1;\n"
+ "bnz.d 1b;\n"
+ "st.ab r8,[r1,4];\n"
+ :
+ : "r" (addr), "r" (data), "r" (longlen)
+ : "r8" );
+ return longlen;
+}
+
+static inline int __raw_writesb(unsigned int addr, void *data, int bytelen) {
+ __asm__ __volatile__ ("1:ldb.ab r8,[r1,1];\n"
+ "sub.f r2,r2,1;\n"
+ "bnz.d 1b;\n"
+ "st.di r8,[r0,0];\n"
+ :
+ : "r" (addr), "r" (data), "r" (bytelen)
+ : "r8" );
+ return bytelen;
+}
+
+static inline int __raw_writesw(unsigned int addr, void *data, int wordlen) {
+ __asm__ __volatile__ ("1:ldw.ab r8,[r1,2];\n"
+ "sub.f r2,r2,1;\n"
+ "bnz.d 1b;\n"
+ "st.ab.di r8,[r0,0];\n"
+ :
+ : "r" (addr), "r" (data), "r" (wordlen)
+ : "r8" );
+ return wordlen;
+}
+
+static inline int __raw_writesl(unsigned int addr, void *data, int longlen) {
+ __asm__ __volatile__ ("1:ld.ab r8,[r1,4];\n"
+ "sub.f r2,r2,1;\n"
+ "bnz.d 1b;\n"
+ "st.ab.di r8,[r0,0];\n"
+ :
+ : "r" (addr), "r" (data), "r" (longlen)
+ : "r8" );
+ return longlen;
+}
+
+/*
+ * Generic virtual read/write
+ */
+#define __arch_getw(a) (*(volatile unsigned short *)(a))
+#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
+
+#define iomem_valid_addr(iomem,sz) (1)
+#define iomem_to_phys(iomem) (iomem)
+
+#ifdef __io
+#define outb(v,p) __raw_writeb(v,__io(p))
+#define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
+#define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
+
+#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
+#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
+#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
+
+#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
+#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
+#define outsl(p,d,l) __raw_writesl(__io(p),d,l)
+
+#define insb(p,d,l) __raw_readsb(__io(p),d,l)
+#define insw(p,d,l) __raw_readsw(__io(p),d,l)
+#define insl(p,d,l) __raw_readsl(__io(p),d,l)
+#endif
+
+#define outb_p(val,port) outb((val),(port))
+#define outw_p(val,port) outw((val),(port))
+#define outl_p(val,port) outl((val),(port))
+#define inb_p(port) inb((port))
+#define inw_p(port) inw((port))
+#define inl_p(port) inl((port))
+
+#define outsb_p(port,from,len) outsb(port,from,len)
+#define outsw_p(port,from,len) outsw(port,from,len)
+#define outsl_p(port,from,len) outsl(port,from,len)
+#define insb_p(port,to,len) insb(port,to,len)
+#define insw_p(port,to,len) insw(port,to,len)
+#define insl_p(port,to,len) insl(port,to,len)
+
+#define readb(addr) (*(volatile unsigned char *) (addr))
+#define readw(addr) (*(volatile unsigned short *) (addr))
+#define readl(addr) (*(volatile unsigned int *) (addr))
+#define writeb(b,addr) (*(volatile unsigned char *) (addr) = (b))
+#define writew(b,addr) (*(volatile unsigned short *) (addr) = (b))
+#define writel(b,addr) (*(volatile unsigned int *) (addr) = (b))
+
+extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
+extern void *ioremap(unsigned long physaddr, unsigned long size);
+extern void *ioremap_nocache(unsigned long physaddr, unsigned long size);
+extern void __iounmap(void *addr, unsigned long size);
+extern void iounmap(void *addr);
+
+/*
+ * IO bus memory addresses are also 1:1 with the physical address
+ */
+#define virt_to_bus virt_to_phys
+#define bus_to_virt phys_to_virt
+
+
+/* Written to pacify arch indepeandant code.
+ * Not used by ARC I/O
+ */
+
+/* #define inb(x) 0 */
+/* #define outb(x,y) do { } while(0) */
+
+#define _inb inb
+#define _outb outb
+
+#define IO_SPACE_LIMIT 0xffff
+
+#define IOMAP_FULL_CACHING 0
+#define IOMAP_NOCACHE_SER 1
+#define IOMAP_NOCACHE_NONSER 2
+#define IOMAP_WRITETHROUGH 3
+
+#endif /* _ASM_ARC_IO_H */
+
diff --git a/include/asm-arc/posix_types.h b/include/asm-arc/posix_types.h
new file mode 100644
index 0000000..4cfbd3b
--- /dev/null
+++ b/include/asm-arc/posix_types.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/posix_types.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ */
+#ifndef _ASM_ARC_POSIX_TYPES_H
+#define _ASM_ARC_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc. Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned short __kernel_dev_t;
+typedef unsigned long __kernel_ino_t;
+typedef unsigned short __kernel_mode_t;
+typedef unsigned short __kernel_nlink_t;
+typedef long __kernel_off_t;
+typedef int __kernel_pid_t;
+typedef unsigned short __kernel_ipc_pid_t;
+typedef unsigned short __kernel_uid_t;
+typedef unsigned short __kernel_gid_t;
+typedef unsigned int __kernel_size_t;
+typedef int __kernel_ssize_t;
+typedef int __kernel_ptrdiff_t;
+typedef long __kernel_time_t;
+typedef long __kernel_suseconds_t;
+typedef long __kernel_clock_t;
+typedef int __kernel_daddr_t;
+typedef char * __kernel_caddr_t;
+typedef unsigned short __kernel_uid16_t;
+typedef unsigned short __kernel_gid16_t;
+typedef unsigned int __kernel_uid32_t;
+typedef unsigned int __kernel_gid32_t;
+
+typedef unsigned short __kernel_old_uid_t;
+typedef unsigned short __kernel_old_gid_t;
+
+#ifdef __GNUC__
+typedef long long __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+ int val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+ int __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef __FD_SET
+#define __FD_SET(fd, fdsetp) \
+ (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31)))
+
+#undef __FD_CLR
+#define __FD_CLR(fd, fdsetp) \
+ (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31)))
+
+#undef __FD_ISSET
+#define __FD_ISSET(fd, fdsetp) \
+ ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0)
+
+#undef __FD_ZERO
+#define __FD_ZERO(fdsetp) \
+ (memset (fdsetp, 0, sizeof (*(fd_set *)fdsetp)))
+
+#endif
+
+#endif /* _ASM_ARC_POSIX_TYPES_H */
diff --git a/include/asm-arc/processor.h b/include/asm-arc/processor.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/include/asm-arc/processor.h
diff --git a/include/asm-arc/ptrace.h b/include/asm-arc/ptrace.h
new file mode 100644
index 0000000..9ca27e8
--- /dev/null
+++ b/include/asm-arc/ptrace.h
@@ -0,0 +1,137 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/ptrace.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ */
+#ifndef __ASM_ARC_PTRACE_H
+#define __ASM_ARC_PTRACE_H
+
+#include <linux/config.h>
+#include <asm/debug.h>
+#include <asm/arcregs.h>
+
+/* Offsets of various elements(registers) of struct pt_regs on the stack.
+ * The offsets starts with 4 because sp points to next free element on stack
+ */
+
+#define PT_bta 4
+#define PT_lp_start 8
+#define PT_lp_end 12
+#define PT_lp_count 16
+#define PT_status32 20
+#define PT_ret 24
+#define PT_blink 28
+#define PT_fp 32
+#define PT_r26 36
+#define PT_r12 40
+#define PT_r11 44
+#define PT_r10 48
+#define PT_r9 52
+#define PT_r8 56
+#define PT_r7 60
+#define PT_r6 64
+#define PT_r5 68
+#define PT_r4 72
+#define PT_r3 76
+#define PT_r2 80
+#define PT_r1 84
+#define PT_r0 88
+#define PT_orig_r0 92
+#define PT_orig_r8 96
+#define PT_sp 100
+
+
+#ifndef __ASSEMBLY__
+
+/* this struct defines the way the registers are stored on the
+ stack during a system call. */
+
+struct pt_regs {
+ /* After a SAVE_ALL_SYS or a SAVE ALL_INT, SP points to next free
+ * entry on stack. So this place holder
+ */
+ long stack_place_holder;
+ long bta; /* bta_l1, bta_l2, erbta */
+ long lp_start;
+ long lp_end;
+ long lp_count;
+ long status32; /* status32_l1, status32_l2, erstatus */
+ long ret; /* ilink1, ilink2 or eret*/
+ long blink;
+ long fp;
+ long r26; /* gp */
+ long r12;
+ long r11;
+ long r10;
+ long r9;
+ long r8;
+ long r7;
+ long r6;
+ long r5;
+ long r4;
+ long r3;
+ long r2;
+ long r1;
+ long r0;
+ long orig_r0;
+ long orig_r8; /*used to distinguish between an exception, a system call, int1 or int2 */
+ long sp; /* user sp or kernel sp, depending on where we came from */
+};
+
+/* Callee saved registers - need to be saved only when you are scheduled out */
+
+struct callee_regs {
+ /* After a SAVE_ALL_SYS or a SAVE ALL_INT, SP points to next free
+ * entry on stack. So this place holder
+ */
+ long stack_place_holder;
+ long r25;
+ long r24;
+ long r23;
+ long r22;
+ long r21;
+ long r20;
+ long r19;
+ long r18;
+ long r17;
+ long r16;
+ long r15;
+ long r14;
+ long r13;
+};
+
+#endif /* !__ASSEMBLY__ */
+
+#ifdef __KERNEL__
+
+#define PTRACE_GETREGS 12
+#define PTRACE_SETREGS 13
+#define PTRACE_GETFPREGS 14
+#define PTRACE_SETFPREGS 15
+
+#define PTRACE_SETOPTIONS 21
+
+#define PTRACE_O_TRACESYSGOOD 0x00000001
+
+
+
+#ifndef __ASSEMBLY__
+extern void show_regs(struct pt_regs *);
+
+/* return 1 if user mode or 0 if kernel mode */
+#define user_mode(regs) ((regs->status32 & STATUS_U_MASK) == STATUS_U_MASK)
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASM_PTRACE_H */
+
diff --git a/include/asm-arc/serial.h b/include/asm-arc/serial.h
new file mode 100644
index 0000000..3ff9f3a
--- /dev/null
+++ b/include/asm-arc/serial.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/serial.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#ifndef _ASM_ARC_SERIAL_H
+#define _ASM_ARC_SERIAL_H
+
+#include <config.h>
+
+typedef volatile struct {
+ volatile unsigned char id0 __attribute__((aligned(4)));
+ volatile unsigned char id1 __attribute__((aligned(4)));
+ volatile unsigned char id2 __attribute__((aligned(4)));
+ volatile unsigned char id3 __attribute__((aligned(4)));
+ volatile unsigned char data __attribute__((aligned(4)));
+ volatile unsigned char status __attribute__((aligned(4)));
+ volatile unsigned char baudl __attribute__((aligned(4)));
+ volatile unsigned char baudh __attribute__((aligned(4)));
+} arc_uart;
+
+/*
+ * Define the number of ports supported and their irqs.
+ */
+#define NR_PORTS 1
+
+#define CONSOLE_BAUD_RATE CONFIG_ARC_SERIAL_BAUD
+
+
+#define UART_RXENB 0x04
+#define UART_RXEMPTY 0x20
+#define UART_FRAME_ERR 0x01
+#define UART_OVERFLOW_ERR 0x02
+
+#define UART_TXENB 0x40
+#define UART_TXEMPTY 0x80
+
+/* UART control registers */
+#define ARC_UART_CREG_DATATX UART_BASEADDR + 0x4
+#define ARC_UART_CREG_DATARX UART_BASEADDR + 0x4
+#define ARC_UART_CREG_STATUS UART_BASEADDR + 0x5
+#endif /* _ASM_ARC_SERIAL_H */
diff --git a/include/asm-arc/setup.h b/include/asm-arc/setup.h
new file mode 100755
index 0000000..79e86a2
--- /dev/null
+++ b/include/asm-arc/setup.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/setup.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#ifndef __ASMARC_SETUP_H
+#define __ASMARC_SETUP_H
+
+#include<linux/types.h>
+
+/*
+ * The new way of passing information: a list of tagged entries
+ */
+
+/* The list ends with an ATAG_NONE node. */
+
+#define ATAG_NONE 0x00000000
+
+struct tag_header {
+ u32 size;
+ u32 tag;
+};
+
+/* The list must start with an ATAG_CORE node */
+#define ATAG_CORE 0x54410001
+
+struct tag_core {
+};
+
+/* it is allowed to have multiple ATAG_MEM nodes */
+#define ATAG_MEM 0x54410002
+
+struct tag_mem32 {
+ u32 size;
+};
+
+
+/* clock speed */
+#define ATAG_CLK_SPEED 0x5441003
+
+struct tag_clk_speed {
+ u32 clk_speed_hz;
+};
+
+
+
+/* describes how the ramdisk will be used in kernel */
+#define ATAG_RAMDISK 0x54410004
+
+struct tag_ramdisk {
+ u32 flags; /* bit 0 = load, bit 1 = prompt */
+ u32 size; /* decompressed ramdisk size in _kilo_ bytes */
+ u32 start; /* starting block of floppy-based RAM disk image */
+};
+
+/* describes where the compressed ramdisk image lives (virtual address) */
+/*
+ * this one accidentally used virtual addresses - as such,
+ * its depreciated.
+ */
+#define ATAG_INITRD 0x54410005
+
+/* describes where the compressed ramdisk image lives (physical address) */
+#define ATAG_INITRD2 0x54420005
+
+struct tag_initrd {
+ u32 start; /* physical start address */
+ u32 size; /* size of compressed ramdisk image in bytes */
+};
+
+
+/* configuring cache */
+#define ATAG_CACHE 0x54420006
+struct tag_cache {
+ u16 icache;
+ u16 dcache;
+};
+
+
+
+/* describes the configuration of serial controller */
+
+
+#define ATAG_SERIAL 0x54420007
+struct tag_serial {
+ u32 serial_nr;
+ u32 baudrate;
+};
+
+/* describes the configuration of vmac controller */
+
+#define ATAG_VMAC 0x54420008
+struct tag_vmac {
+ u8 addr[8];
+};
+
+
+
+/* command line: \0 terminated string */
+#define ATAG_CMDLINE 0x54410009
+
+struct tag_cmdline {
+ char cmdline[1]; /* this is the minimum size */
+};
+
+
+struct tag {
+ struct tag_header hdr;
+ union {
+ struct tag_core core;
+ struct tag_mem32 mem;
+ struct tag_ramdisk ramdisk;
+ struct tag_initrd initrd;
+ struct tag_cmdline cmdline;
+ struct tag_cache cache;
+ struct tag_clk_speed clk_speed;
+ struct tag_serial serial;
+ struct tag_vmac vmac;
+
+ } u;
+};
+
+
+
+#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+
+#endif /* __ASMARC_SETUP_H */
diff --git a/include/asm-arc/string.h b/include/asm-arc/string.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/include/asm-arc/string.h
diff --git a/include/asm-arc/sys_ctrl.h b/include/asm-arc/sys_ctrl.h
new file mode 100644
index 0000000..4296acd
--- /dev/null
+++ b/include/asm-arc/sys_ctrl.h
@@ -0,0 +1,25 @@
+#ifndef _ARC_SYS_CTRL_H_
+#define _ARC_SYS_CTRL_H_
+
+/* register definitions for Aurora SYS_CTRL module
+ * (C) ARC International 2007
+ * Amnon Cohen, January 2007
+ */
+
+typedef struct {
+ volatile unsigned id;
+ volatile unsigned mem_cfg1;
+ volatile unsigned bri_ctrl;
+ volatile unsigned tp_rst;
+ volatile unsigned pio_in;
+ volatile unsigned pio_out;
+ volatile unsigned pio_ctrl;
+ volatile unsigned buttons;
+ volatile unsigned dip_switches;
+ volatile unsigned leds;
+} sys_ctrl_reg_t;
+
+#define SYS_CTRL_DEVICE_ADDRESS (sys_ctrl_reg_t *)0xC0FCF000
+
+#endif
+
diff --git a/include/asm-arc/system.h b/include/asm-arc/system.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/include/asm-arc/system.h
diff --git a/include/asm-arc/types.h b/include/asm-arc/types.h
new file mode 100644
index 0000000..085f787
--- /dev/null
+++ b/include/asm-arc/types.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/types.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ */
+
+#ifndef _ASM_ARM_TYPES_H
+#define _ASM_ARM_TYPES_H
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+//#ifdef __KERNEL__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+#define BITS_PER_LONG 32
+
+/* Dma addresses are 32-bits wide. */
+
+typedef u32 dma_addr_t;
+typedef unsigned long phys_addr_t;
+typedef unsigned long phys_size_t;
+
+//#endif /* __KERNEL__ */
+
+#endif
+
diff --git a/include/asm-arc/u-boot.h b/include/asm-arc/u-boot.h
new file mode 100644
index 0000000..8d634b4
--- /dev/null
+++ b/include/asm-arc/u-boot.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/u-boot.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+
+#ifndef __U_BOOT_H__
+#define __U_BOOT_H__
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
+
+typedef struct bd_info {
+#if 1
+ unsigned long bi_memstart; /* start of DRAM memory */
+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
+ unsigned long bi_flashstart; /* start of FLASH memory */
+ unsigned long bi_flashsize; /* size of FLASH memory */
+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
+ unsigned long bi_sramstart; /* start of SRAM memory */
+ unsigned long bi_sramsize; /* size of SRAM memory */
+ unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
+ unsigned long bi_ip_addr; /* IP Address */
+ unsigned char bi_enetaddr[6]; /* Ethernet adress */
+ unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
+ unsigned long bi_intfreq; /* Internal Freq, in MHz */
+ unsigned long bi_busfreq; /* Bus Freq, in MHz */
+ unsigned long bi_baudrate; /* Console Baudrate */
+ ulong bi_boot_params; /* where this board expects params */
+#endif
+// unsigned long bi_ip_addr; /* IP Address */
+// unsigned char bi_enetaddr[6]; /* Ethernet adress */
+// unsigned long bi_boot_params;
+
+} bd_t;
+
+#endif /* __ASSEMBLY__ */
+#endif /* __U_BOOT_H__ */
diff --git a/include/asm-arc/uboot-arc.h b/include/asm-arc/uboot-arc.h
new file mode 100644
index 0000000..f4ab5d3
--- /dev/null
+++ b/include/asm-arc/uboot-arc.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/asm-arc/uboot-arc.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+
+
+#ifndef _U_BOOT_ARC_H_
+#define _U_BOOT_ARC_H_ 1
+extern ulong _arcboot_start; /* code start */
+extern ulong _bss_start; /* bss start */
+extern ulong _bss_end; /* bss end */
+extern ulong __bss_start;
+extern ulong __bss_end;
+extern ulong __vector_start; /* interrupt vector start */
+extern ulong __vector_end; /* interrupt vector end */
+extern ulong __data_start; /* data segment start */
+extern ulong __data_end; /* data segment end */
+int cpu_init(void);
+extern unsigned round_page(unsigned x);
+#endif /* _U_BOOT_ARC_H_ */
diff --git a/include/configs/aa3.h b/include/configs/aa3.h
new file mode 100644
index 0000000..72823d9
--- /dev/null
+++ b/include/configs/aa3.h
@@ -0,0 +1,225 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/configs/aa3.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <config_cmd_default.h>
+
+#undef CONFIG_IDE_PREINIT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_NET
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_PING
+#define CONFIG_BOOTARGS "abc123" // sample Linux cmdline
+
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_PCMCIA_SLOT_A
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_IDE_MAXDEVICE 1
+#define CONFIG_SYS_IDE_MAXBUS 1
+#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_IDE_PREINIT
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_SHOW_BOOT_PROGRESS
+
+
+// Timeouts
+
+#define CONFIG_ARP_TIMEOUT 5000000UL
+
+
+//#define CONFIG_ARC_SYS_CTRL_DEV You need special XBF's for this.
+
+//#define CONFIG_LCD Don't want a display by default.
+#ifdef CONFIG_LCD
+# define CONFIG_ARC_PGU
+# define CONFIG_SYS_LCD_AND_SERIAL_CONSOLE
+# define CONFIG_SPLASH_SCREEN
+# define CONFIG_PREBOOT \
+ "ide reset;"\
+ "setenv splashimage 0x2000000;"\
+ "ext2load ide 0:1 $(splashimage) /boot/logo.bmp;"\
+ "bmp info $(splashimage);"\
+ "cls;"
+#endif
+
+/* Disk stuff */
+#define CONFIG_SYS_ATA_BASE_ADDR 0xc0fc9000
+#define CONFIG_SYS_ATA_REG_OFFSET 0xA0
+#define CONFIG_SYS_ATA_DATA_OFFSET 0xA0
+#define CONFIG_SYS_ATA_ALT_OFFSET 0xA0
+#define CONFIG_SYS_ATA_STRIDE 4
+#undef CONFIG_SYS_DIRECT_FLASH_TFTP
+
+#define CONFIG_BOOTDELAY 10
+#define CONFIG_BOOTCOMMAND \
+ "ide reset;"\
+ "setenv filesize 0;"\
+ "ext2load ide 0:1 4000000 /boot/boot.params;"\
+ "setenv_mem bootparams 4000000 ${filesize};"\
+ "ext2load ide 0:1 4000000 /boot/vmlinux;"\
+ "bootelf"
+
+
+#define CONFIG_ARC 1 /* This is an ARC cpu */
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+
+
+/*
+ * Size of malloc pool
+ */
+#define CONFIG_SYS_MALLOC_LEN 0x8000 /* Malloc size = 32k */
+
+
+/*
+ * Serial configuartion
+ */
+#define CONFIG_ARC_SERIAL_BAUD 57600 /* Baudrate for serial port */
+
+
+/*
+ * Physical memory map
+ */
+
+/*Donot edit automatically defined by mkconfig */
+#define ARC700 1 // For arc 700
+/*#define ARC5 1 For arc 5 automatically defined by mkconfig */
+
+/*This clock speed is for u-boot */
+#define CONFIG_ARC_CLK 80000000 /* 70MHz default clock speed */
+#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
+
+#if defined ARC5
+ #define PHYS_SDRAM_1_SIZE 0x200000 /* 2 MB for arc 5 */
+ #define UART_BASEADDR 0x00FC1000 /* UART base address */
+ #define VMAC_REG_BASEADDR 0x00FC2000 /* EMAC base address */
+#endif
+
+#if defined ARC700
+
+ #define PHYS_SDRAM_1_SIZE 0x400000 /* 4 MB for arc 700*/
+ #define UART_BASEADDR 0xC0FC1000
+ #define VMAC_REG_BASEADDR 0xC0FC2000
+#endif
+
+
+/*
+ * Environment variables
+ */
+#define CONFIG_AUTO_COMPLETE 1 /* Auto complete commands */
+#define CONFIG_HOSTNAME arc_aa4
+#define CONFIG_ETHADDR 00:01:02:03:04:80 /* Ethernet address */
+#define CONFIG_IPADDR 172.16.18.99 /* Our ip address */
+#define CONFIG_SERVERIP 172.16.18.73 /* Tftp server ip address */
+#define CONFIG_NETMASK 255.255.0.0
+
+#if defined ARC700
+ #define CONFIG_LOADADDR 0x80000000 /* Default load address for net commands */
+#else
+ #define CONFIG_LOADADDR 0x0
+#endif
+
+/* Following macros are used for autoboot */
+/*#define CONFIG_BOOTDELAY 5
+#define CONFIG_BOOTFILE arclinux
+#define CONFIG_BOOTCOMMAND \
+ "tftpboot \"arclinux\";" \
+ "go 0x80002000" */
+
+
+/*
+ * Miscellaneous configurable options
+ */
+//#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HZ CONFIG_ARC_CLK
+#define CONFIG_SYS_PROMPT "ArcAngel4 # "
+#define CONFIG_SYS_CBSIZE 256 /* Size of console buffer */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Default load address for bootm command */
+#define CONFIG_SYS_BAUDRATE_TABLE { 57600 }
+#define CONFIG_SYS_MEMTEST_START 0x200 /* Exception table starts at 0x0 */ /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - (350 << 10)/* code + stack area */ - (CONFIG_SYS_MALLOC_LEN << 10)/* malloc area */ )/* size of memory (not accurate)*/
+#if defined ARC5 /* As for now flash works only with ARC5 */
+ #define CONFIG_SYS_DIRECT_FLASH_TFTP 1 /* Directly TFTP writes to flash memory */
+#endif
+
+
+/*
+ * Flash options
+ */
+/*#define CONFIG_SYS_UBOOT_ON_FLASH 0 If flash memory is present and uboot is on the flash then flash = 1 automatically defined by mkconfig*/
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 256 /* Max number of sectors on one chip */
+#define CONFIG_SYS_FLASH_BASE 0x800000 /* Flash base address */
+
+#define CONFIG_ENV_SIZE 1024
+#define CONFIG_SYS_ENV_SIZE 1024
+#define CONFIG_ENV_IS_NOWHERE 1
+#define CONFIG_SYS_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) /* 256k i.e first sector occupied by u-boot second sector contains environment*/
+
+/*
+ * Kernel Parameters
+ */
+
+#define CONFIG_SYS_ENV_IS_NOWHERE
+#define CONFIG_SYS_KERN_PARM 0 /* O - disable kernel parameters
+ 1 - enable kernel parameters
+ */
+
+#if CONFIG_SYS_KERN_PARM
+
+
+#if defined ARC700 /* Only ARC700 kernel accepts parameters from u-boot*/
+
+#define CONFIG_CLK_SPEED_TAG CONFIG_ARC_CLK /* clock speed */
+
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* configuring bank */
+#ifdef CONFIG_SETUP_MEMORY_TAGS /* Memory size */
+#define CONFIG_MEMORY_SIZE 0x400000
+#endif /* CONFIG_SETUP_MEMORY_TAGS */
+
+#if 0
+# define CONFIG_CACHE_TAG 1
+#ifdef CONFIG_CACHE_TAG
+ #define CONFIG_ICACHE 1
+ #define CONFIG_DCACHE 1
+#endif /* CONFIG_CACHE_TAG */
+#endif
+
+# define CONFIG_SERIAL_TAG 1
+#ifdef CONFIG_SERIAL_TAG
+ #define CONFIG_UART0_BAUDRATE CONFIG_ARC_SERIAL_BAUD
+#endif /* CONFIG_SERIAL_TAG */
+
+# define CONFIG_VMAC_TAG 1
+#ifdef CONFIG_VMAC_TAG
+ #define CONFIG_VMAC_ADDR "00:01:02:03:04:26"
+#endif /* CONFIG_VMAC_TAG */
+#endif /* ARC700*/
+#endif /* CONFIG_SYS_KERN_PARM */
+
+#endif /* __CONFIG_H */
+
+
+
diff --git a/include/configs/arcangel_arc700_ram.h b/include/configs/arcangel_arc700_ram.h
new file mode 100644
index 0000000..c9b4fc8
--- /dev/null
+++ b/include/configs/arcangel_arc700_ram.h
@@ -0,0 +1,225 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/configs/aa3.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <config_cmd_default.h>
+
+#define CONFIG_ARC_AA4_BOARD 1
+
+#undef CONFIG_IDE_PREINIT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_NET
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_PING
+#define CONFIG_BOOTARGS "abc123" // sample Linux cmdline
+
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_PCMCIA_SLOT_A
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_IDE_MAXDEVICE 1
+#define CONFIG_SYS_IDE_MAXBUS 1
+#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_IDE_PREINIT
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_SHOW_BOOT_PROGRESS
+
+#define CONFIG_ELF_GUARD
+
+// Timeouts
+
+#define CONFIG_ARP_TIMEOUT 5000000UL
+
+
+//#define CONFIG_ARC_SYS_CTRL_DEV You need special XBF's for this.
+
+//#define CONFIG_LCD Don't want a display by default.
+#ifdef CONFIG_LCD
+# define CONFIG_ARC_PGU
+# define CONFIG_SYS_LCD_AND_SERIAL_CONSOLE
+# define CONFIG_SPLASH_SCREEN
+# define CONFIG_PREBOOT \
+ "ide reset;"\
+ "setenv splashimage 0x2000000;"\
+ "ext2load ide 0:1 $(splashimage) /boot/logo.bmp;"\
+ "bmp info $(splashimage);"\
+ "cls;"
+#endif
+
+/* Disk stuff */
+#define CONFIG_SYS_ATA_BASE_ADDR 0xc0fc9000
+#define CONFIG_SYS_ATA_REG_OFFSET 0xA0
+#define CONFIG_SYS_ATA_DATA_OFFSET 0xA0
+#define CONFIG_SYS_ATA_ALT_OFFSET 0xA0
+#define CONFIG_SYS_ATA_STRIDE 4
+#undef CONFIG_SYS_DIRECT_FLASH_TFTP
+
+#define CONFIG_BOOTDELAY 10
+#define CONFIG_BOOTCOMMAND \
+ "ide reset;"\
+ "ext2load ide 0:1 4000000 /boot/vmlinux;"\
+ "bootelf"
+
+
+#define CONFIG_ARC 1 /* This is an ARC cpu */
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+
+
+/*
+ * Size of malloc pool
+ */
+#define CONFIG_SYS_MALLOC_LEN 0x8000 /* Malloc size = 32k */
+
+
+/*
+ * Serial configuartion
+ */
+#define CONFIG_ARC_SERIAL_BAUD 115200 /* Baudrate for serial port */
+
+
+/*
+ * Physical memory map
+ */
+
+/*Donot edit automatically defined by mkconfig */
+#define ARC700 1 // For arc 700
+/*#define ARC5 1 For arc 5 automatically defined by mkconfig */
+
+/*This clock speed is for u-boot */
+#define CONFIG_ARC_CLK 80000000 /* 70MHz default clock speed */
+#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
+
+#if defined ARC5
+ #define PHYS_SDRAM_1_SIZE 0x200000 /* 2 MB for arc 5 */
+ #define UART_BASEADDR 0x00FC1000 /* UART base address */
+ #define VMAC_REG_BASEADDR 0x00FC2000 /* EMAC base address */
+#endif
+
+#if defined ARC700
+
+ #define PHYS_SDRAM_1_SIZE 0x400000 /* 4 MB for arc 700*/
+ #define UART_BASEADDR 0xC0FC1000
+ #define VMAC_REG_BASEADDR ((volatile unsigned int *)0xC0FC2000)
+#endif
+
+
+/*
+ * Environment variables
+ */
+#define CONFIG_AUTO_COMPLETE 1 /* Auto complete commands */
+#define CONFIG_HOSTNAME arc_aa4
+#define CONFIG_ETHADDR 00:01:02:03:04:80 /* Ethernet address */
+#define CONFIG_IPADDR 172.16.18.99 /* Our ip address */
+#define CONFIG_SERVERIP 172.16.0.196 /* Tftp server ip address */
+#define CONFIG_NETMASK 255.255.0.0
+
+#if defined ARC700
+ #define CONFIG_LOADADDR 0x80000000 /* Default load address for net commands */
+#else
+ #define CONFIG_LOADADDR 0x0
+#endif
+
+/* Following macros are used for autoboot */
+/*#define CONFIG_BOOTDELAY 5
+#define CONFIG_BOOTFILE arclinux
+#define CONFIG_BOOTCOMMAND \
+ "tftpboot \"arclinux\";" \
+ "go 0x80002000" */
+
+
+/*
+ * Miscellaneous configurable options
+ */
+//#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HZ CONFIG_ARC_CLK
+#define CONFIG_SYS_PROMPT "ArcAngel4 # "
+#define CONFIG_SYS_CBSIZE 256 /* Size of console buffer */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Default load address for bootm command */
+#define CONFIG_SYS_BAUDRATE_TABLE { 57600 }
+#define CONFIG_SYS_MEMTEST_START 0x200 /* Exception table starts at 0x0 */ /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - (350 << 10)/* code + stack area */ - (CONFIG_SYS_MALLOC_LEN << 10)/* malloc area */ )/* size of memory (not accurate)*/
+#if defined ARC5 /* As for now flash works only with ARC5 */
+ #define CONFIG_SYS_DIRECT_FLASH_TFTP 1 /* Directly TFTP writes to flash memory */
+#endif
+
+
+/*
+ * Flash options
+ */
+/*#define CONFIG_SYS_UBOOT_ON_FLASH 0 If flash memory is present and uboot is on the flash then flash = 1 automatically defined by mkconfig*/
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 256 /* Max number of sectors on one chip */
+#define CONFIG_SYS_FLASH_BASE 0x800000 /* Flash base address */
+
+#define CONFIG_ENV_SIZE 1024
+#define CONFIG_SYS_ENV_SIZE 1024
+#define CONFIG_ENV_IS_NOWHERE 1
+#define CONFIG_SYS_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) /* 256k i.e first sector occupied by u-boot second sector contains environment*/
+
+/*
+ * Kernel Parameters
+ */
+
+#define CONFIG_SYS_ENV_IS_NOWHERE
+#define CONFIG_SYS_KERN_PARM 0 /* O - disable kernel parameters
+ 1 - enable kernel parameters
+ */
+
+#if CONFIG_SYS_KERN_PARM
+
+
+#if defined ARC700 /* Only ARC700 kernel accepts parameters from u-boot*/
+
+#define CONFIG_CLK_SPEED_TAG CONFIG_ARC_CLK /* clock speed */
+
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* configuring bank */
+#ifdef CONFIG_SETUP_MEMORY_TAGS /* Memory size */
+#define CONFIG_MEMORY_SIZE 0x400000
+#endif /* CONFIG_SETUP_MEMORY_TAGS */
+
+#if 0
+# define CONFIG_CACHE_TAG 1
+#ifdef CONFIG_CACHE_TAG
+ #define CONFIG_ICACHE 1
+ #define CONFIG_DCACHE 1
+#endif /* CONFIG_CACHE_TAG */
+#endif
+
+# define CONFIG_SERIAL_TAG 1
+#ifdef CONFIG_SERIAL_TAG
+ #define CONFIG_UART0_BAUDRATE CONFIG_ARC_SERIAL_BAUD
+#endif /* CONFIG_SERIAL_TAG */
+
+# define CONFIG_VMAC_TAG 1
+#ifdef CONFIG_VMAC_TAG
+ #define CONFIG_VMAC_ADDR "00:01:02:03:04:26"
+#endif /* CONFIG_VMAC_TAG */
+#endif /* ARC700*/
+#endif /* CONFIG_SYS_KERN_PARM */
+
+#endif /* __CONFIG_H */
+
+
+
diff --git a/include/configs/ml50x_arc600.h b/include/configs/ml50x_arc600.h
new file mode 100644
index 0000000..85648ba
--- /dev/null
+++ b/include/configs/ml50x_arc600.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright Codito Technologies (www.codito.com)
+ *
+ * include/configs/aa3.h
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_ARC 1 /* This is an ARC cpu */
+#define CONFIG_ARC_ML50X_BOARD 1
+
+#define CONFIG_SYS_NO_FLASH
+
+#include <config_cmd_default.h>
+/* disable some default commands to decrease size */
+#undef CONFIG_CMD_BDI /* bdinfo */
+#undef CONFIG_CMD_BOOTD /* bootd */
+#undef CONFIG_CMD_CONSOLE /* coninfo */
+#undef CONFIG_CMD_ECHO /* echo arguments */
+#undef CONFIG_CMD_SAVEENV /* saveenv */
+#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
+#undef CONFIG_CMD_IMI /* iminfo */
+#undef CONFIG_CMD_ITEST /* Integer (and string) test */
+#undef CONFIG_CMD_LOADB /* loadb */
+#undef CONFIG_CMD_LOADS /* loads */
+#undef CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
+#undef CONFIG_CMD_MISC /* Misc functions like sleep etc*/
+#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
+#undef CONFIG_CMD_NFS /* NFS support */
+#undef CONFIG_CMD_RUN /* run command in env variable */
+#undef CONFIG_CMD_SOURCE /* "source" command support */
+#undef CONFIG_CMD_XIMG /* Load part of Multi Image */
+
+#define CONFIG_CMD_ELF
+#define CONFIG_ELF_GUARD
+#define CONFIG_BOOTMQX
+#define CONFIG_CMD_FAT
+
+#define CONFIG_DOS_PARTITION
+#undef CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_SHOW_BOOT_PROGRESS
+
+/* System ACE controller configuration */
+#define CONFIG_SYSTEMACE
+#define CONFIG_SYS_SYSTEMACE_BASE (ARC_CPU_PERIPHERAL_BASE + 0x8000)
+#define CONFIG_SYS_SYSTEMACE_WIDTH 16
+#define SYSTEMACE_FORCE_LOCK 0
+
+/* Serial port configuartion */
+#define CONFIG_ARC_SERIAL_BAUD 115200
+#define UART_BASEADDR (ARC_CPU_PERIPHERAL_BASE + 0x1000)
+
+#if 0
+/* Doesn't work because there are some BCVI bridge troubles */
+/* XEMACS configuration */
+#define CONFIG_XILINX_EMAC
+#define XILINX_EMAC_BASEADDR (ARC_CPU_PERIPHERAL_BASE + 0x2000)
+#define CONFIG_HOSTNAME ml50x_board
+#define CONFIG_ETHADDR 00:01:02:03:04:80 /* Ethernet address */
+#define CONFIG_IPADDR 192.168.100.99 /* Our ip address */
+#define CONFIG_SERVERIP 192.168.100.1 /* Tftp server ip address */
+#define CONFIG_NETMASK 255.255.255.0
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+
+#endif
+
+#define CONFIG_BOOTDELAY 5
+#define CONFIG_BOOTCOMMAND "fatload ace 0:0 ${loadaddr} app.elf; bootmqx"
+
+/*
+ * Size of malloc pool
+ */
+#define CONFIG_SYS_MALLOC_LEN 0x8000 /* Malloc size = 32k */
+
+/*
+ * Physical memory map
+ */
+
+/*This clock speed is for u-boot */
+#define CONFIG_ARC_CLK 70000000 /* 70MHz default clock speed */
+#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x200000
+
+/*
+ * Environment variables
+ */
+#define CONFIG_AUTO_COMPLETE 1 /* Auto complete commands */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_HZ CONFIG_ARC_CLK
+#define CONFIG_SYS_PROMPT "ML50X # "
+#define CONFIG_SYS_CBSIZE 256 /* Size of console buffer */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Default load address for bootm command */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_SYS_MEMTEST_START 0x200 /* Exception table starts at 0x0 */ /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - (350 << 10) /* code + stack area */ - (CONFIG_SYS_MALLOC_LEN << 10)/* malloc area */ )/* size of memory (not accurate)*/
+
+#define CONFIG_ENV_SIZE 512
+#define CONFIG_SYS_ENV_SIZE 512
+#define CONFIG_ENV_IS_NOWHERE 1
+#define CONFIG_SYS_KERN_PARM 0
+
+#endif /* __CONFIG_H */
diff --git a/include/image.h b/include/image.h
index f183757..62199af 100644
--- a/include/image.h
+++ b/include/image.h
@@ -109,6 +109,7 @@
#define IH_ARCH_BLACKFIN 16 /* Blackfin */
#define IH_ARCH_AVR32 17 /* AVR32 */
#define IH_ARCH_ST200 18 /* STMicroelectronics ST200 */
+#define IH_ARCH_ARC 19 /* ARC */
/*
* Image Types
@@ -480,6 +481,8 @@
if (!image_check_arch (hdr, IH_ARCH_SH))
#elif defined(__sparc__)
if (!image_check_arch (hdr, IH_ARCH_SPARC))
+#elif defined(__arc__)
+ if (!image_check_arch (hdr, IH_ARCH_ARC))
#else
# error Unknown CPU type
#endif
diff --git a/include/systemace.h b/include/systemace.h
index be43d46..9cbf880 100644
--- a/include/systemace.h
+++ b/include/systemace.h
@@ -27,5 +27,37 @@
block_dev_desc_t * systemace_get_dev(int dev);
+#define SYSTEMACE_BUS_MODE_REG (0x00)
+#define SYSTEMACE_STATUS_REG (0x04)
+#define SYSTEMACE_MPU_LBA_REG_LOW (0x10)
+#define SYSTEMACE_MPU_LBA_REG_HIGH (0x12)
+#define SYSTEMACE_SECT_CNT_CMD_REG (0x14)
+#define SYSTEMACE_CONTROL_REG (0x18)
+#define SYSTEMACE_DATA_BUF (0x40)
+
+#define SYSTEMACE_SR_CFGLOCK (0x0001) /**< Config port lock status */
+#define SYSTEMACE_SR_MPULOCK (0x0002) /**< MPU port lock status */
+#define SYSTEMACE_SR_CF_CTRLR_ERR (0x0008)
+#define SYSTEMACE_SR_CARD_DETECT (0x0010)
+#define SYSTEMACE_SR_DATA_BUF_RDY (0x0020) /**< Enable data ready Status */
+#define SYSTEMACE_SR_RDY_FOR_CMD (0x0100)
+
+#define SYSTEMACE_CR_FORCELOCK (0x0001) /**< Force lock request */
+#define SYSTEMACE_CR_DATARDYIRQ (0x0100) /**< Enable data ready IRQ */
+#define SYSTEMACE_CR_ERRORIRQ (0x0200) /**< Enable error IRQ */
+#define SYSTEMACE_CR_CFGDONEIRQ (0x0400) /**< Enable CFG done IRQ */
+#define SYSTEMACE_CR_LOCKREQ (0x0002) /**< MPU lock request */
+#define SYSTEMACE_CR_CFGRESET (0x0080) /**< CFG reset */
+#define SYSTEMACE_CR_RESETIRQ (0x0800) /**< Reset IRQ line */
+
+#define SYSTEMACE_CCR_IDENTIFY (0x0200) /**< Identify CF card command */ )
+#define SYSTEMACE_CCR_RESET (0x0100)
+#define SYSTEMACE_CCR_ABORT (0x0600)
+
+#define SYSTEMACE_DATA_BUF_SIZE (32)
+#define SYSTEMACE_CCR_READ_CMD (0x0300)
+#define SYSTEMACE_CCR_WRITE_CMD (0x0400)
+
+
#endif /* CONFIG_SYSTEMACE */
#endif /* __SYSTEMACE_H */
diff --git a/lib_arc/Makefile b/lib_arc/Makefile
new file mode 100644
index 0000000..cb80a39
--- /dev/null
+++ b/lib_arc/Makefile
@@ -0,0 +1,37 @@
+#
+# Copyright Codito Technologies (www.codito.com)
+#
+# lib_arc/Makefile
+#
+# Copyright (C)
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License version 2 as
+# published by the Free Software Foundation.
+#
+# Authors : Sandeep Patil (sandeep.patil@codito.com)
+# Pradeep Sawlani (pradeep.sawlani@codito.com)
+#
+
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(ARCH).a
+
+AOBJS =
+
+COBJS = board.o arclinux.o arcmqx.o
+
+OBJS = $(AOBJS) $(COBJS)
+
+$(LIB): .depend $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend: Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/lib_arc/arclinux.c b/lib_arc/arclinux.c
new file mode 100644
index 0000000..c9598c0
--- /dev/null
+++ b/lib_arc/arclinux.c
@@ -0,0 +1,318 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <command.h>
+#include <image.h>
+#include <u-boot/zlib.h>
+#include <asm/byteorder.h>
+#include <asm/setup.h>
+
+
+DECLARE_GLOBAL_DATA_PTR;
+
+
+
+#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
+ defined (CONFIG_CMDLINE_TAG) || \
+ defined (CONFIG_INITRD_TAG) || \
+ defined (CONFIG_SERIAL_TAG) || \
+ defined (CONFIG_REVISION_TAG) || \
+ defined (CONFIG_VFD) || \
+ defined (CONFIG_LCD)
+static void setup_start_tag (bd_t *bd);
+
+# ifdef CONFIG_SETUP_MEMORY_TAGS
+static void setup_memory_tags (bd_t *bd);
+# endif
+static void setup_commandline_tag (bd_t *bd, char *commandline);
+
+#if 0
+static void setup_ramdisk_tag (bd_t *bd);
+#endif
+# ifdef CONFIG_INITRD_TAG
+static void setup_initrd_tag (bd_t *bd, ulong initrd_start,
+ ulong initrd_end);
+# endif
+static void setup_end_tag (bd_t *bd);
+
+# if defined (CONFIG_VFD) || defined (CONFIG_LCD)
+static void setup_videolfb_tag (gd_t *gd);
+# endif
+
+static struct tag *params;
+#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
+
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
+ bootm_headers_t *images)
+{
+ ulong initrd_start, initrd_end;
+ ulong ep = 0;
+ bd_t *bd = gd->bd;
+ char *s;
+ int machid; // = bd->bi_arch_number;
+ void (*theKernel)(int zero, int arch, uint params);
+ int ret;
+
+#ifdef CONFIG_CMDLINE_TAG
+ char *commandline = getenv ("bootargs");
+#endif
+
+ /* find kernel entry point */
+ if (images->legacy_hdr_valid) {
+ ep = image_get_ep (&images->legacy_hdr_os_copy);
+#if defined(CONFIG_FIT)
+ } else if (images->fit_uname_os) {
+ ret = fit_image_get_entry (images->fit_hdr_os,
+ images->fit_noffset_os, &ep);
+ if (ret) {
+ puts ("Can't get entry point property!\n");
+ goto error;
+ }
+#endif
+ } else {
+ puts ("Could not find kernel entry point!\n");
+ goto error;
+ }
+ theKernel = (void (*)(int, int, uint))ep;
+
+ s = getenv ("machid");
+ if (s) {
+ machid = simple_strtoul (s, NULL, 16);
+ printf ("Using machid 0x%x from environment\n", machid);
+ }
+
+ ret = boot_get_ramdisk (argc, argv, images, IH_ARCH_ARM,
+ &initrd_start, &initrd_end);
+ if (ret)
+ goto error;
+
+ show_boot_progress (15);
+
+ debug ("## Transferring control to Linux (at address %08lx) ...\n",
+ (ulong) theKernel);
+
+#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
+ defined (CONFIG_CMDLINE_TAG) || \
+ defined (CONFIG_INITRD_TAG) || \
+ defined (CONFIG_SERIAL_TAG) || \
+ defined (CONFIG_REVISION_TAG) || \
+ defined (CONFIG_LCD) || \
+ defined (CONFIG_VFD)
+ setup_start_tag (bd);
+#ifdef CONFIG_SERIAL_TAG
+ setup_serial_tag (¶ms);
+#endif
+#ifdef CONFIG_REVISION_TAG
+ setup_revision_tag (¶ms);
+#endif
+#ifdef CONFIG_SETUP_MEMORY_TAGS
+ setup_memory_tags (bd);
+#endif
+#ifdef CONFIG_CMDLINE_TAG
+ setup_commandline_tag (bd, commandline);
+#endif
+#ifdef CONFIG_INITRD_TAG
+ if (initrd_start && initrd_end)
+ setup_initrd_tag (bd, initrd_start, initrd_end);
+#endif
+#if defined (CONFIG_VFD) || defined (CONFIG_LCD)
+ setup_videolfb_tag ((gd_t *) gd);
+#endif
+ setup_end_tag (bd);
+#endif
+
+
+ /* we assume that the kernel is in place */
+ printf ("\nStarting kernel ...\n\n");
+
+#ifdef CONFIG_USB_DEVICE
+ {
+ extern void udc_disconnect (void);
+ udc_disconnect ();
+ }
+#endif
+
+// cleanup_before_linux ();
+
+ theKernel (0, machid, bd->bi_boot_params);
+ /* does not return */
+ return;
+
+error:
+ return;
+}
+
+
+#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
+ defined (CONFIG_CMDLINE_TAG) || \
+ defined (CONFIG_INITRD_TAG) || \
+ defined (CONFIG_SERIAL_TAG) || \
+ defined (CONFIG_REVISION_TAG) || \
+ defined (CONFIG_LCD) || \
+ defined (CONFIG_VFD)
+static void setup_start_tag (bd_t *bd)
+{
+ params = (struct tag *) bd->bi_boot_params;
+
+ params->hdr.tag = ATAG_CORE;
+ params->hdr.size = tag_size (tag_core);
+
+// params->u.core.flags = 0;
+// params->u.core.pagesize = 0;
+// params->u.core.rootdev = 0;
+
+ params = tag_next (params);
+}
+
+
+#ifdef CONFIG_SETUP_MEMORY_TAGS
+static void setup_memory_tags (bd_t *bd)
+{
+ int i;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ params->hdr.tag = ATAG_MEM;
+ params->hdr.size = tag_size (tag_mem32);
+
+// params->u.mem.start = bd->bi_dram[i].start;
+// params->u.mem.size = bd->bi_dram[i].size;
+
+ params = tag_next (params);
+ }
+}
+#endif /* CONFIG_SETUP_MEMORY_TAGS */
+
+
+static void setup_commandline_tag (bd_t *bd, char *commandline)
+{
+ char *p;
+
+ if (!commandline)
+ return;
+
+ /* eat leading white space */
+ for (p = commandline; *p == ' '; p++);
+
+ /* skip non-existent command lines so the kernel will still
+ * use its default command line.
+ */
+ if (*p == '\0')
+ return;
+printf("Command line TAG setup\n");
+ params->hdr.tag = ATAG_CMDLINE;
+ params->hdr.size =
+ (sizeof (struct tag_header) + strlen (p) + 1 + 4) >> 2;
+
+ strcpy (params->u.cmdline.cmdline, p);
+ printf("Params->u.cmdline.cmdline %s\n", params->u.cmdline.cmdline);
+ printf("p %s\n", p);
+
+
+ params = tag_next (params);
+}
+
+
+#ifdef CONFIG_INITRD_TAG
+static void setup_initrd_tag (bd_t *bd, ulong initrd_start, ulong initrd_end)
+{
+ /* an ATAG_INITRD node tells the kernel where the compressed
+ * ramdisk can be found. ATAG_RDIMG is a better name, actually.
+ */
+ params->hdr.tag = ATAG_INITRD2;
+ params->hdr.size = tag_size (tag_initrd);
+
+ params->u.initrd.start = initrd_start;
+ params->u.initrd.size = initrd_end - initrd_start;
+
+ params = tag_next (params);
+}
+#endif /* CONFIG_INITRD_TAG */
+
+
+#if defined (CONFIG_VFD) || defined (CONFIG_LCD)
+extern ulong calc_fbsize (void);
+static void setup_videolfb_tag (gd_t *gd)
+{
+ /* An ATAG_VIDEOLFB node tells the kernel where and how large
+ * the framebuffer for video was allocated (among other things).
+ * Note that a _physical_ address is passed !
+ *
+ * We only use it to pass the address and size, the other entries
+ * in the tag_videolfb are not of interest.
+ */
+ params->hdr.tag = ATAG_VIDEOLFB;
+ params->hdr.size = tag_size (tag_videolfb);
+
+ params->u.videolfb.lfb_base = (u32) gd->fb_base;
+ /* Fb size is calculated according to parameters for our panel
+ */
+ params->u.videolfb.lfb_size = calc_fbsize();
+
+ params = tag_next (params);
+}
+#endif /* CONFIG_VFD || CONFIG_LCD */
+
+#ifdef CONFIG_SERIAL_TAG
+void setup_serial_tag (struct tag **tmp)
+{
+ struct tag *params = *tmp;
+ struct tag_serialnr serialnr;
+ void get_board_serial(struct tag_serialnr *serialnr);
+
+ get_board_serial(&serialnr);
+ params->hdr.tag = ATAG_SERIAL;
+ params->hdr.size = tag_size (tag_serialnr);
+ params->u.serialnr.low = serialnr.low;
+ params->u.serialnr.high= serialnr.high;
+ params = tag_next (params);
+ *tmp = params;
+printf("config_serial_tag\n");
+
+}
+#endif
+
+#ifdef CONFIG_REVISION_TAG
+void setup_revision_tag(struct tag **in_params)
+{
+ u32 rev = 0;
+ u32 get_board_rev(void);
+
+ rev = get_board_rev();
+ params->hdr.tag = ATAG_REVISION;
+ params->hdr.size = tag_size (tag_revision);
+ params->u.revision.rev = rev;
+ params = tag_next (params);
+}
+#endif /* CONFIG_REVISION_TAG */
+
+
+static void setup_end_tag (bd_t *bd)
+{
+ params->hdr.tag = ATAG_NONE;
+ params->hdr.size = 0;
+}
+
+#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
diff --git a/lib_arc/arcmqx.c b/lib_arc/arcmqx.c
new file mode 100644
index 0000000..c43cdc5
--- /dev/null
+++ b/lib_arc/arcmqx.c
@@ -0,0 +1,29 @@
+#include <common.h>
+#include <asm/uboot-arc.h>
+
+#if defined(CONFIG_BOOTMQX)
+
+int init_mqx_context(void)
+{
+ unsigned long addr = 0;
+ enable_interrupts();
+ /* indeed only 10 bits of address should be 0 but we already
+ * have function for rounding */
+ addr = round_page((unsigned)&__bss_end + CONFIG_SYS_MALLOC_LEN);
+ write_new_aux_reg(ARC_REG_INT_VEC_BASE, addr);
+ printf("interrupt vector base address is set to the: 0x%x\n", (unsigned)addr);
+ return 0;
+}
+
+int cleanup_mqx_context(void)
+{
+ unsigned long addr = 0;
+
+ disable_interrupts();
+ addr = (unsigned)&__vector_start;
+ write_new_aux_reg(ARC_REG_INT_VEC_BASE, addr);
+ printf("interrupt vector base address is restored to the: 0x%x\n", addr);
+ return 0;
+}
+
+#endif
diff --git a/lib_arc/board.c b/lib_arc/board.c
new file mode 100644
index 0000000..cec49c7
--- /dev/null
+++ b/lib_arc/board.c
@@ -0,0 +1,194 @@
+/*
+ * Copyright Codito Technologies (www.codito.com) Aug 15 , 2005
+ *
+ * lib_arc/board.c
+ *
+ * Copyright (C)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Authors : Sandeep Patil (sandeep.patil@codito.com)
+ * Pradeep Sawlani (pradeep.sawlani@codito.com)
+ */
+
+
+#include <common.h> /* Serial functions */
+#include <linux/types.h> /* ulong typedef */
+#include <asm/uboot-arc.h> /* _start */
+#include <asm/global_data.h> /* For global data structre */
+#include <version.h>
+#include <config.h>
+#include <net.h>
+#include <devices.h>
+
+const char version_string[] =
+ U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")";
+
+static int display_banner (void);
+
+typedef int (init_fnc_t) (void);
+
+int board_init(void);
+
+init_fnc_t *init_sequence[] = {
+ cpu_init, /* cpu specific initialisations*/
+ board_init,
+ serial_init, /* serial communications setup */
+ env_init, /* intialise environment */
+ console_init_f, /* stage 1 init of console */
+ display_banner, /* say that we are here */
+ NULL,
+};
+
+
+/*
+ * Begin and End of memory area for malloc(), and current "brk"
+ */
+static ulong mem_malloc_start = 0;
+static ulong mem_malloc_end = 0;
+static ulong mem_malloc_brk = 0;
+
+static int display_banner (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ printf ("\n\n%s\n\n", version_string);
+ printf ("running at %dHZ\n", (unsigned)gd->cpu_clk);
+#ifndef CONFIG_ARC_AA4_BOARD
+ printf ("using timer: %i\n", ARC_BOARD_TIMER);
+#endif
+ printf ("global data pointer: 0x%x\n", (unsigned)gd);
+ printf ("load addr @ 0x%x\n", CONFIG_LOADADDR);
+ printf (".text @ 0x%x\n", TEXT_BASE);
+ printf (".vector @ 0x%x (0x%x bytes)\n", (unsigned)&__vector_start,
+ (unsigned)&__vector_end - (unsigned)&__vector_start);
+ printf (".data @ 0x%x (0x%x bytes)\n", (unsigned)&__data_start,
+ (unsigned)&__data_end - (unsigned)&__data_start);
+ printf (".bss @ 0x%x (0x%x bytes)\n", (unsigned)&__bss_start,
+ (unsigned)&__bss_end - (unsigned)&__bss_start);
+
+ return 0;
+}
+
+static void mem_malloc_init (ulong dest_addr)
+{
+ mem_malloc_start = dest_addr;
+ mem_malloc_end = dest_addr + CONFIG_SYS_MALLOC_LEN;
+ mem_malloc_brk = mem_malloc_start;
+ memset ((void *) mem_malloc_start, 0,mem_malloc_end - mem_malloc_start);
+ printf (".heap @ 0x%x (0x%x bytes)\n", mem_malloc_start,
+ mem_malloc_end - mem_malloc_start);
+}
+
+void *sbrk (ptrdiff_t increment)
+{
+ ulong old = mem_malloc_brk;
+ ulong new = old + increment;
+
+ if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
+ return (NULL);
+ }
+ mem_malloc_brk = new;
+ return ((void *) old);
+}
+
+
+#ifndef CONFIG_SYS_NO_FLASH
+static void display_flash_config (ulong size)
+{
+ puts ("Flash: ");
+ print_size (size, "\n");
+}
+#endif
+
+unsigned round_page(unsigned x)
+{
+ x += 0xfff;
+ x &= ~0xfff;
+ return x;
+}
+
+gd_t *global_data;
+gd_t *gd;
+
+
+void start_arcboot(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ static gd_t gd_data;
+ static bd_t bd_data;
+ init_fnc_t **init_fnc_ptr;
+ extern void *__text_end;
+ //cmd_tbl_t *cmdtp;
+ unsigned stage = 0xf;
+
+ show_boot_progress(stage--);
+ dcache_disable();
+
+ gd = global_data = &gd_data;
+ gd->bd = &bd_data;
+ gd->baudrate = CONFIG_ARC_SERIAL_BAUD;
+ gd->cpu_clk = CONFIG_ARC_CLK;
+
+ /* frame buffer will sit after end of program */
+ gd->fb_base = round_page((unsigned)__text_end);
+
+ for (init_fnc_ptr = init_sequence;*init_fnc_ptr;++init_fnc_ptr) {
+ show_boot_progress(stage--);
+ if ((*init_fnc_ptr)() != 0) {
+ hang();
+ }
+ }
+
+ /* Setup malloc area */
+#ifndef CONFIG_ARC_AA4_BOARD
+ mem_malloc_init((unsigned)&__bss_end);
+#else
+ mem_malloc_init(TEXT_BASE - CONFIG_SYS_MALLOC_LEN);
+#endif
+#ifndef CONFIG_SYS_NO_FLASH
+ display_flash_config(flash_init());
+#endif
+ env_relocate();
+
+ /*IP Address */
+ gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
+
+ /* MAC Address */
+ {
+ int i;
+ ulong reg;
+ char *s, *e;
+ uchar tmp[64];
+ i = getenv_r ("ethaddr", tmp, sizeof (tmp));
+ s = (i > 0) ? tmp : NULL;
+
+ for (reg = 0; reg < 6; ++reg) {
+ gd->bd->bi_enetaddr[reg] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+
+ }
+ }
+ devices_init(); /* get the devices list going. */
+ jumptable_init();
+ console_init_r();
+#if defined(CONFIG_CMD_NET)
+#if defined(CONFIG_ARC_AA4_BOARD)
+ eth_initialize(gd->bd);
+#else
+ eth_init(gd->bd);
+#endif
+#endif
+ for(;;) {
+ main_loop();
+ }
+}
+
+void hang()
+{
+ printf("please reset....\n");
+ for(;;);
+}
diff --git a/net/eth.c b/net/eth.c
index 8940ebf..6cdefee 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -202,6 +202,10 @@
#if defined(CONFIG_DB64460) || defined(CONFIG_P3Mx)
mv6446x_eth_initialize(bis);
#endif
+
+#if defined (CONFIG_ARC)
+ arc_eth_init(bis);
+#endif
if (!eth_devices) {
puts ("No ethernet found.\n");
show_boot_progress (-64);
diff --git a/net/net.c b/net/net.c
index 5637cf5..48cc54b 100644
--- a/net/net.c
+++ b/net/net.c
@@ -747,7 +747,7 @@
#if defined(CONFIG_NET_MULTI)
printf ("Using %s device\n", eth_get_name());
#endif /* CONFIG_NET_MULTI */
- NetSetTimeout (10000UL, PingTimeout);
+ NetSetTimeout (100000000UL, PingTimeout);
NetSetHandler (PingHandler);
PingSend();
diff --git a/net/nfs.c b/net/nfs.c
index 0101629..e794c9a 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -674,7 +674,8 @@
case STATE_READ_REQ:
rlen = nfs_read_reply (pkt, len);
- NetSetTimeout (NFS_TIMEOUT, NfsTimeout);
+// ARC Added CONFIG_SYS_HZ
+ NetSetTimeout (NFS_TIMEOUT * CONFIG_SYS_HZ, NfsTimeout);
if (rlen > 0) {
nfs_offset += rlen;
NfsSend ();
@@ -761,7 +762,8 @@
printf ("\nLoad address: 0x%lx\n"
"Loading: *\b", load_addr);
- NetSetTimeout (NFS_TIMEOUT, NfsTimeout);
+// ARC Added CONFIG_SYS_HZ
+ NetSetTimeout (NFS_TIMEOUT*CONFIG_SYS_HZ, NfsTimeout);
NetSetHandler (NfsHandler);
NfsTimeoutCount = 0;
diff --git a/net/tftp.c b/net/tftp.c
index b0f1cca..efc1983 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -15,7 +15,8 @@
#if defined(CONFIG_CMD_NET)
#define WELL_KNOWN_PORT 69 /* Well known TFTP port # */
-#define TIMEOUT 5000UL /* Millisecs to timeout for lost pkt */
+// ARC
+#define TIMEOUT 50000UL /* Millisecs to timeout for lost pkt */
#ifndef CONFIG_NET_RETRY_COUNT
# define TIMEOUT_COUNT 10 /* # of timeouts before giving up */
#else
@@ -34,7 +35,8 @@
#define TFTP_ERROR 5
#define TFTP_OACK 6
-static ulong TftpTimeoutMSecs = TIMEOUT;
+// ARC Added CONFIG_SYS_HZ
+static ulong TftpTimeoutMSecs = TIMEOUT*CONFIG_SYS_HZ;
static int TftpTimeoutCountMax = TIMEOUT_COUNT;
/*
@@ -385,7 +387,7 @@
}
TftpLastBlock = TftpBlock;
- TftpTimeoutMSecs = TIMEOUT;
+ TftpTimeoutMSecs = TIMEOUT * CONFIG_SYS_HZ; // SRS
TftpTimeoutCountMax = TIMEOUT_COUNT;
NetSetTimeout (TftpTimeoutMSecs, TftpTimeout);
@@ -534,7 +536,8 @@
puts ("Loading: *\b");
- TftpTimeoutMSecs = TftpRRQTimeoutMSecs;
+// ARC added CONFIG_SYS_HZ
+TftpTimeoutMSecs = TftpRRQTimeoutMSecs * CONFIG_SYS_HZ;
TftpTimeoutCountMax = TftpRRQTimeoutCountMax;
NetSetTimeout (TftpTimeoutMSecs, TftpTimeout);
