include/asm-arc/arcregs.h

/*
 * Copyright Codito Technologies (www.codito.com)  
 *
 *  include/asm-arc/arcregs.h
 *
 *  Copyright (C) 
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Authors: Sandeep Patil (sandeep.patil@codito.com)
 * 			Pradeep Sawlani (pradeep.sawlani@codito.com)
 * Auxiliary register definitions and macros to read and write to them. 
 */

#ifndef	_ASM_ARC_ARCDEFS_H
#define	_ASM_ARC_ARCDEFS_H

/* These masks correspond to the status word(STATUS_32) bits */
#define	STATUS_H_SET			0x01		/* Mask for Halt bit */
#define	STATUS_E1_MASK			0x02		/* Mask for Interrupt 1 enable */
#define	STATUS_E2_MASK			0x04		/* Mask for Interrupt 2 enable */
#define STATUS_DISABLE_INTERRUPTS	0xFFFFFFF9	/* Mask to disable Interrupts  */


/* Auxiliary register values	*/
#define ARC_REG_STATUS32	0x00A	/* status 32 register */
#define ARC_REG_TIMER0_CNT      0x021	/* timer 0 count */
#define ARC_REG_TIMER0_CTRL	0x022	/* timer 0 control */
#define ARC_REG_TIMER0_LIMIT	0x023	/* timer 0 limit */
#define ARC_REG_INT_VEC_BASE	0x025	/* interrupt vector base
					 * address */
#define ARC_REG_TIMER1_CNT      0x100	/* timer 1 count */
#define ARC_REG_TIMER1_CTRL	0x101	/* timer 1 control */
#define ARC_REG_TIMER1_LIMIT	0x102	/* timer 1 limit */

/* Instruction cache related Auxiliary registers */
#define ARC_REG_I_CACHE_BUILD_REG 0x77
#define ARC_REG_IC_IVIC		0x10
#define ARC_REG_IC_CTRL		0x11
#define ARC_REG_IC_IVIL     0x19
/* Data cache related Auxiliary registers */
#define ARC_REG_D_CACHE_BUILD_REG 0x72
#define ARC_REG_DC_IVDC		0x47
#define ARC_REG_DC_CTRL		0x48
#define ARC_REG_DC_IVDL     0x4A
#define ARC_REG_DC_FLSH     0x4B
#define ARC_REG_DC_FLDL     0x4C

#define IM_SET_DC_CTRL 		0x40


/* Inline macros for reading, writing into auxiliary registers	*/

#ifndef	__ASSEMBLY__
/* Read an auxiliary register */
#define	read_new_aux_reg(reg)						\
	({ unsigned int __ret;							\
	 	__asm__ __volatile__("lr	%0, [%1]":"=r"(__ret):"i"(reg));\
	 	__ret;								\
	 })
		
/* Write to an auxiliary register */

#define	write_new_aux_reg(reg, val)					\
	({ 									\
	 	__asm__ __volatile__ ("sr	%0, [%1]"::"r"(val),"i"(reg));		\
	 })

#endif	/* __ASSEMBLY__ */

#endif	/* _ASM_ARC_ARCDEFS_H */