Hard code FIFO depth of SPI controller to 32
The DesignWare SPI controller DW_apb_ssi can by synthesized with
different FIFO depths. Ideally, the driver would auto-detect the FIFO
depth. A less ideal approach is to specify the FIFO depth in the board
file as platform_data. The worst approach is to hard code the value in
the driver code.
The high speed and low speed SPI controllers have 32-word and 8-word
deep FIFOs, respectively. This change breaks compatibility with the low
speed SPI controller which we disabled in a previous commit.
Change-Id: I764e29fee25fc2f172dc0c08805513eea81986c2
1 file changed
