tree a76ef9b0789233faa41a4577d4f79574bc629478
parent 7416e8663c0a441240f410439f1194f12a8756f7
author Daniel Mentz <danielmentz@google.com> 1403021398 -0700
committer Daniel Mentz <danielmentz@google.com> 1403027829 -0700

Hard code FIFO depth of SPI controller to 32

The DesignWare SPI controller DW_apb_ssi can by synthesized with
different FIFO depths. Ideally, the driver would auto-detect the FIFO
depth. A less ideal approach is to specify the FIFO depth in the board
file as platform_data. The worst approach is to hard code the value in
the driver code.

The high speed and low speed SPI controllers have 32-word and 8-word
deep FIFOs, respectively. This change breaks compatibility with the low
speed SPI controller which we disabled in a previous commit.

Change-Id: I764e29fee25fc2f172dc0c08805513eea81986c2