| * Freescale 83xx and 512x PCI bridges |
| |
| Freescale 83xx and 512x SOCs include the same pci bridge core. |
| |
| 83xx/512x specific notes: |
| - reg: should contain two address length tuples |
| The first is for the internal pci bridge registers |
| The second is for the pci config space access registers |
| |
| Example (MPC8313ERDB) |
| pci0: pci@e0008500 { |
| cell-index = <1>; |
| interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| interrupt-map = < |
| /* IDSEL 0x0E -mini PCI */ |
| 0x7000 0x0 0x0 0x1 &ipic 18 0x8 |
| 0x7000 0x0 0x0 0x2 &ipic 18 0x8 |
| 0x7000 0x0 0x0 0x3 &ipic 18 0x8 |
| 0x7000 0x0 0x0 0x4 &ipic 18 0x8 |
| |
| /* IDSEL 0x0F - PCI slot */ |
| 0x7800 0x0 0x0 0x1 &ipic 17 0x8 |
| 0x7800 0x0 0x0 0x2 &ipic 18 0x8 |
| 0x7800 0x0 0x0 0x3 &ipic 17 0x8 |
| 0x7800 0x0 0x0 0x4 &ipic 18 0x8>; |
| interrupt-parent = <&ipic>; |
| interrupts = <66 0x8>; |
| bus-range = <0x0 0x0>; |
| ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
| 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
| 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; |
| clock-frequency = <66666666>; |
| #interrupt-cells = <1>; |
| #size-cells = <2>; |
| #address-cells = <3>; |
| reg = <0xe0008500 0x100 /* internal registers */ |
| 0xe0008300 0x8>; /* config space access registers */ |
| compatible = "fsl,mpc8349-pci"; |
| device_type = "pci"; |
| }; |
