blob: c53fc0610116eddb10b6fd052dbe10b269137022 [file] [log] [blame]
/*
* Copyright (c) 2013 Qualcomm Atheros, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <config.h>
#include <version.h>
#include <atheros.h>
extern int ath_ddr_initial_config(uint32_t refresh);
extern int ath_ddr_find_size(void);
#ifdef COMPRESSED_UBOOT
# define prmsg(x) strcpy(s, x)
# define CHECKBOARD_PARAMS char *s
#else
# define prmsg printf
# define CHECKBOARD_PARAMS void
#endif
void
ath_usb1_initial_config(void)
{
#define unset(a) (~(a))
ath_reg_wr_nf(SWITCH_CLOCK_SPARE_ADDRESS,
ath_reg_rd(SWITCH_CLOCK_SPARE_ADDRESS) |
SWITCH_CLOCK_SPARE_USB_REFCLK_FREQ_SEL_SET(5));
udelay(1000);
ath_reg_rmw_set(RST_RESET_ADDRESS,
RST_RESET_USB_PHY_SUSPEND_OVERRIDE_SET(1));
udelay(1000);
ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_RESET_SET(1));
udelay(1000);
ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_ARESET_SET(1));
udelay(1000);
ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_HOST_RESET_SET(1));
udelay(1000);
ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_PLL_PWD_EXT_SET(1));
udelay(10);
ath_reg_rmw_set(RST_RESET2_ADDRESS, RST_RESET2_USB1_EXT_PWR_SEQ_SET(1));
udelay(10);
}
void
ath_usb2_initial_config(void)
{
ath_reg_rmw_set(RST_RESET2_ADDRESS, RST_RESET2_USB2_MODE_SET(1));
udelay(10);
ath_reg_rmw_set(RST_RESET2_ADDRESS,
RST_RESET2_USB_PHY2_SUSPEND_OVERRIDE_SET(1));
udelay(1000);
ath_reg_rmw_clear(RST_RESET2_ADDRESS, RST_RESET2_USB_PHY2_RESET_SET(1));
udelay(1000);
ath_reg_rmw_clear(RST_RESET2_ADDRESS, RST_RESET2_USB_PHY2_ARESET_SET(1));
udelay(1000);
ath_reg_rmw_clear(RST_RESET2_ADDRESS, RST_RESET2_USB_HOST2_RESET_SET(1));
udelay(1000);
ath_reg_rmw_clear(RST_RESET2_ADDRESS, RST_RESET2_USB_PHY2_PLL_PWD_EXT_SET(1));
udelay(10);
ath_reg_rmw_set(RST_RESET2_ADDRESS, RST_RESET2_USB2_EXT_PWR_SEQ_SET(1));
udelay(10);
}
void ath_gpio_config(void)
{
#if 0
/* Disable clock obs */
ath_reg_wr (AR7240_GPIO_FUNC, (ath_reg_rd(AR7240_GPIO_FUNC) & 0xffe7e0ff));
/* Enable eth Switch LEDs */
#ifdef CONFIG_K31
ath_reg_wr (AR7240_GPIO_FUNC, (ath_reg_rd(AR7240_GPIO_FUNC) | 0xd8));
#else
ath_reg_wr (AR7240_GPIO_FUNC, (ath_reg_rd(AR7240_GPIO_FUNC) | 0xfa));
#endif
#endif
}
int
ath_mem_config(void)
{
unsigned int type, reg32, *tap;
extern uint32_t *ath_ddr_tap_cal(void);
#if !defined(CONFIG_ATH_EMULATION)
type = ath_ddr_initial_config(CFG_DDR_REFRESH_VAL);
tap = ath_ddr_tap_cal();
prmsg("tap = 0x%p\n", tap);
tap = (uint32_t *)0xbd007f10;
prmsg("Tap (low, high) = (0x%x, 0x%x)\n", tap[0], tap[1]);
tap = (uint32_t *)TAP_CONTROL_0_ADDRESS;
prmsg("Tap values = (0x%x, 0x%x, 0x%x, 0x%x)\n",
tap[0], tap[2], tap[2], tap[3]);
/* Take WMAC out of reset */
reg32 = ath_reg_rd(RST_RESET_ADDRESS);
reg32 = reg32 & ~RST_RESET_RTC_RESET_SET(1);
ath_reg_wr_nf(RST_RESET_ADDRESS, reg32);
ath_usb1_initial_config();
ath_usb2_initial_config();
ath_gpio_config();
#endif /* !defined(CONFIG_ATH_EMULATION) */
return ath_ddr_find_size();
}
long int initdram(int board_type)
{
return (ath_mem_config());
}
int checkboard(CHECKBOARD_PARAMS)
{
prmsg("U-boot Scorpion\n");
return 0;
}