| /* |
| * (C) Copyright 2002 |
| * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| * Marius Groeger <mgroeger@sysgo.de> |
| * |
| * (C) Copyright 2002 |
| * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| * Alex Zuepke <azu@sysgo.de> |
| * |
| * See file CREDITS for list of people who contributed to this |
| * project. |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| * MA 02111-1307 USA |
| */ |
| |
| /* |
| * CPU specific code |
| */ |
| |
| #include <common.h> |
| #include <command.h> |
| #include <asm/arch/pxa-regs.h> |
| #include <asm/system.h> |
| |
| #ifdef CONFIG_USE_IRQ |
| DECLARE_GLOBAL_DATA_PTR; |
| #endif |
| |
| static void cache_flush(void); |
| |
| int cpu_init (void) |
| { |
| /* |
| * setup up stacks if necessary |
| */ |
| #ifdef CONFIG_USE_IRQ |
| IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; |
| FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; |
| #endif |
| return 0; |
| } |
| |
| int cleanup_before_linux (void) |
| { |
| /* |
| * this function is called just before we call linux |
| * it prepares the processor for linux |
| * |
| * just disable everything that can disturb booting linux |
| */ |
| |
| disable_interrupts (); |
| |
| /* turn off I-cache */ |
| icache_disable(); |
| dcache_disable(); |
| |
| /* flush I-cache */ |
| cache_flush(); |
| |
| return (0); |
| } |
| |
| /* flush I/D-cache */ |
| static void cache_flush (void) |
| { |
| unsigned long i = 0; |
| |
| asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); |
| } |
| |
| #ifndef CONFIG_CPU_MONAHANS |
| void set_GPIO_mode(int gpio_mode) |
| { |
| int gpio = gpio_mode & GPIO_MD_MASK_NR; |
| int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; |
| int gafr; |
| |
| if (gpio_mode & GPIO_MD_MASK_DIR) |
| { |
| GPDR(gpio) |= GPIO_bit(gpio); |
| } |
| else |
| { |
| GPDR(gpio) &= ~GPIO_bit(gpio); |
| } |
| gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2)); |
| GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2)); |
| } |
| #endif /* CONFIG_CPU_MONAHANS */ |