Merge "Update GFLT110 config to work on Rev2 boards." into prism_dev
diff --git a/Makefile b/Makefile
index 27e79d6..2adc076 100644
--- a/Makefile
+++ b/Makefile
@@ -2809,7 +2809,7 @@
 		echo "#define GFLT110" >> $(obj)include/config.h ;	\
 		echo "#define MV_BOOTSIZE_512K" >> $(obj)include/config.h ; \
 		echo "#define MV_BOOTROM" >> $(obj)include/config.h ;	\
-		echo "MV_DDR_FREQ=400rd_A-MC" >> $(obj)include/config.mk ;\
+		echo "MV_DDR_FREQ=256mb_400mhz_gflt110" >> $(obj)include/config.mk ;\
 		echo "  * Configured for GFLT110"; \
 	else \
 		echo "  * Error no board was configured"; \
diff --git a/board/mv_feroceon/mv_kw2/kw2_family/boardEnv/mvBoardEnvSpec.c b/board/mv_feroceon/mv_kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
index 8aca83f..655b861 100644
--- a/board/mv_feroceon/mv_kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
+++ b/board/mv_feroceon/mv_kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
@@ -1392,14 +1392,14 @@
 	.ledsPolarity = 0,
 
 	/* GPP values */
-	.gppOutEnValLow = RD_88F6601_GPP_OUT_ENA_LOW,
-	.gppOutEnValMid = RD_88F6601_GPP_OUT_ENA_MID,
+	.gppOutEnValLow = GFLT110_GPP_OUT_ENA_LOW,
+	.gppOutEnValMid = GFLT110_GPP_OUT_ENA_MID,
 	.gppOutEnValHigh = 0,
-	.gppOutValLow = RD_88F6601_GPP_OUT_VAL_LOW,
-	.gppOutValMid = RD_88F6601_GPP_OUT_VAL_MID,
+	.gppOutValLow = GFLT110_GPP_OUT_VAL_LOW,
+	.gppOutValMid = GFLT110_GPP_OUT_VAL_MID,
 	.gppOutValHigh = 0,
-	.gppPolarityValLow = RD_88F6601_GPP_POL_LOW,
-	.gppPolarityValMid = RD_88F6601_GPP_POL_MID,
+	.gppPolarityValLow = GFLT110_GPP_POL_LOW,
+	.gppPolarityValMid = GFLT110_GPP_POL_MID,
 	.gppPolarityValHigh = 0,
 
 	/* External Switch Configuration */
diff --git a/board/mv_feroceon/mv_kw2/kw2_family/boardEnv/mvBoardEnvSpec.h b/board/mv_feroceon/mv_kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
index 6964224..50ffbd1 100644
--- a/board/mv_feroceon/mv_kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
+++ b/board/mv_feroceon/mv_kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
@@ -511,4 +511,45 @@
 #define GFLT200_EVT1_GPP_POL_LOW	0x0
 #define GFLT200_EVT1_GPP_POL_MID	0x0
 
+
+/***************************************************************************
+** GFLT110
+****************************************************************************/
+#define GFLT110_MPP0_7		0x22222220
+#define GFLT110_MPP8_15		0x00000002
+#define GFLT110_MPP16_23		0x00400000
+#define GFLT110_MPP24_31		0x00200650
+#define GFLT110_MPP32_37		0x00000000
+
+/* GPPs
+ 1 SPI0_MOSI (out)
+ 2 SPI0_SCK (out)
+ 3 SPI0_CSn[0] (out)
+ 4 SPI0_MISO (in)
+ 5 I2C0_SDA (inout)
+ 6 I2C0_SCK (inout)
+ 7 UA0_TXD (out)
+ 8 UA0_RXD (in)
+20 LED_PON
+21 PON_BEN (out)
+24 XVR_Tx_IND
+25 LED_G
+26 LED_Y
+28 NF&SPI_WP
+29 XVR_SD (in)
+33 TX_Fault/TX_indication
+37 TX_PD
+
+
+*/
+#define GFLT110_GPP_OUT_ENA_LOW	(BIT0 | BIT14 | BIT16 | BIT17 | BIT18 | BIT19 | BIT22 | BIT23 | BIT24 | BIT27| BIT30 | BIT31)
+#define GFLT110_GPP_OUT_ENA_MID	(BIT0 | BIT3 | BIT4)
+
+#define GFLT110_GPP_OUT_VAL_LOW	0x0
+#define GFLT110_GPP_OUT_VAL_MID	0x0
+
+#define GFLT110_GPP_POL_LOW		(BIT23)
+#define GFLT110_GPP_POL_MID		0x0
+
+
 #endif /* __INCmvBoardEnvSpech */
diff --git a/dramregs_256mb_400mhz_gflt110_ddr3.txt b/dramregs_256mb_400mhz_gflt110_ddr3.txt
new file mode 100644
index 0000000..797173c
--- /dev/null
+++ b/dramregs_256mb_400mhz_gflt110_ddr3.txt
@@ -0,0 +1,27 @@
+0xFFD01400 0x43014C30
+0xFFD01404 0xB8603000
+0xFFD01408 0x3303555D
+0xFFD0140C 0x16000C3F
+0xFFD01410 0x00000001
+0xFFD01424 0x0000014F
+0xFFD01428 0x000C5720
+0xFFD01430 0x77777777
+0xFFD01434 0xDCA20177
+0xFFD0147c 0x0000A471
+0xFFD01494 0x00010000
+0xFFD0149C 0x0000E801
+0xFFD01504 0x0FFFFFF0
+0xFFD0150c 0x07FFFFF4
+0xFFD01514 0x0FFFFFF8
+0xFFD0151c 0x0FFFFFFc
+0xFFD20004 0x00000000
+0xFFD20000 0x0FFF0E01
+0xFFD015D0 0x00000620
+0xFFD015D4 0x00000044
+0xFFD015D8 0x00000000
+0xFFD015DC 0x00000000
+0xFFD015E0 0x00000001
+0xFFD015E4 0x00203C18
+0xFFD01620 0x00380000
+0xFFD014B0 0x0000000F
+0xFFD01480 0x00000001