| /* |
| * (C) Copyright 2000 |
| * Dave Ellis, SIXNET, dge@sixnetio.com |
| * |
| * See file CREDITS for list of people who contributed to this |
| * project. |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| * MA 02111-1307 USA |
| */ |
| |
| Using the Motorola MPC8XXFADS development board |
| =============================================== |
| |
| CONFIGURATIONS |
| -------------- |
| |
| There are ready-to-use default configurations available for the |
| FADS823, FADS850SAR and FADS860T. The FADS860T configuration also |
| works for the 855T processor. |
| |
| LOADING U-Boot INTO FADS FLASH MEMORY |
| -------------------------------------- |
| |
| MPC8BUG can load U-Boot into the FLASH memory using LOADF. |
| |
| loadf u-boot.srec 100000 |
| |
| |
| STARTING U-Boot FROM MPC8BUG |
| ----------------------------- |
| |
| To start U-Boot from MPC8BUG: |
| |
| 1. Reset the board: |
| reset :h |
| |
| 2. Change BR0 and OR0 back to their values at reset: |
| rms memc br0 00000001 |
| rms memc or0 00000d34 |
| |
| 3. Modify DER so MPC8BUG gets control only when it should: |
| rms der 2002000f |
| |
| 4. Start as if from reset: |
| go 100 |
| |
| This is NOT exactly the same as starting U-Boot without |
| MPC8BUG. MPC8BUG turns off the watchdog as part of the hard reset. |
| After it does the reset it writes SYPCR (to disable the watchdog) |
| and sets BR0 and OR0 to map the FLASH at 0x02800000 (and does lots |
| of other initialization). That is why it is necessary to set BR0 |
| and OR0 to map the FLASH everywhere. U-Boot can't turn on the |
| watchdog after that, since MPC8BUG has used the only chance to write |
| to SYPCR. |
| |
| Here is a bizarre sequence of MPC8BUG and U-Boot commands that lets |
| U-Boot write to SYPCR. It works with MPC8BUG 1.5 and an 855T |
| processor (your mileage may vary). It is probably better (and a lot |
| easier) just to accept having the watchdog disabled when the debug |
| cable is connected. |
| |
| in MPC8BUG: |
| reset :h |
| rms memc br0 00000001 |
| rms memc or0 00000d34 |
| rms der 2000f |
| go 100 |
| |
| Now U-Boot is running with the MPC8BUG value for SYPCR. Use the |
| U-Boot 'reset' command to reset the board. |
| =>reset |
| Next, in MPC8BUG: |
| rms der 2000f |
| go |
| |
| Now U-Boot is running with the U-Boot value for SYPCR. |