ddr3libv2: bobk: Fix read from DFX server

	-Server Base address is read from  DFX window
	 that is set by BOOTROM instead of configure it by
         DDR driver.
	-Read SatR from SAR1 status register -
	 cancell WA for init frequency read from SatR
	 when read was done from(SAR1_OVERRIDE) instead of (SAR1).

Change-Id: I60891eb461c3e6239778b361216d349a82275f80
Signed-off-by: Margarita Granov <margra@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/22596
Reviewed-by: Haim Boot <hayim@marvell.com>
Tested-by: Star_New_DDR <star-new-ddr@marvell.com>
Tested-by: Star_Automation <star@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24152
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
index 8bf0a50..e27fa4c 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
@@ -1486,10 +1486,9 @@
 	GT_U32 data;
 
     /* calc SAR */
-    CHECK_STATUS(ddr3TipBobKServerRegRead(devNum, REG_DEVICE_SAR1_OVERRIDE_ADDR, /* in BOBK SAR should be read from REG_DEVICE_SAR1_OVERRIDE_ADDR since 
-                                                                                    read from REG_DEVICE_SAR1_ADDR register returns wrong value (0)*/
-                                           &data, MASK_ALL_BITS ));
-	mvPrintf("SAR1 is 0x%X\n", data);
+    CHECK_STATUS(ddr3TipBobKServerRegRead(devNum, REG_DEVICE_SAR1_ADDR,&data, MASK_ALL_BITS ));
+    DEBUG_TRAINING_ACCESS(DEBUG_LEVEL_INFO, ("SAR1 is 0x%X\n", data));
+
     data = (data >> PLL1_CNFIG_OFFSET) & PLL1_CNFIG_MASK;
 
     switch(data)
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Soc/ddr3_msys_bobk_training.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Soc/ddr3_msys_bobk_training.c
index 9d3cc9e..2961d14 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Soc/ddr3_msys_bobk_training.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Soc/ddr3_msys_bobk_training.c
@@ -26,6 +26,7 @@
 #include "mvSiliconIf.h"
 #include "mvDdr3TrainingIpPrvIf.h"
 #include "mvHwsDdr3BobK.h"
+#include "soc_spec.h"
 #include "printf.h"
 
 /************************** globals ***************************************/
@@ -321,12 +322,10 @@
 	if(configDone == MV_TRUE)
 		return;
 
-	MV_REG_WRITE(REG_XBAR_WIN_5_CTRL_ADDR, 0xF0081);
+    serverBaseAddr = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(1));
 
-	serverBaseAddr = MV_REG_READ(REG_XBAR_WIN_5_BASE_ADDR);
-
-	/* init server access */
-	hwsServerRegSetFuncPtr = serverRegSet; 
+    /* init server access */
+	hwsServerRegSetFuncPtr = serverRegSet;
 	hwsServerRegGetFuncPtr = serverRegGet;
 
 	configDone = MV_TRUE;