ddr3libv2: bobk: Fix read from DFX server

	-Server Base address is read from  DFX window
	 that is set by BOOTROM instead of configure it by
         DDR driver.
	-Read SatR from SAR1 status register -
	 cancell WA for init frequency read from SatR
	 when read was done from(SAR1_OVERRIDE) instead of (SAR1).

Change-Id: I60891eb461c3e6239778b361216d349a82275f80
Signed-off-by: Margarita Granov <margra@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/22596
Reviewed-by: Haim Boot <hayim@marvell.com>
Tested-by: Star_New_DDR <star-new-ddr@marvell.com>
Tested-by: Star_Automation <star@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24152
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
2 files changed