| /* |
| * (C) Copyright 2009 Samsung Electronics |
| * Minkyu Kang <mk7.kang@samsung.com> |
| * Heungjun Kim <riverful.kim@samsung.com> |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| * MA 02111-1307 USA |
| * |
| */ |
| |
| #ifndef _S5PC1XX_CPU_H |
| #define _S5PC1XX_CPU_H |
| |
| #define S5P_CPU_NAME "S5P" |
| #define S5PC1XX_ADDR_BASE 0xE0000000 |
| |
| /* S5PC100 */ |
| #define S5PC100_PRO_ID 0xE0000000 |
| #define S5PC100_CLOCK_BASE 0xE0100000 |
| #define S5PC100_GPIO_BASE 0xE0300000 |
| #define S5PC100_VIC0_BASE 0xE4000000 |
| #define S5PC100_VIC1_BASE 0xE4100000 |
| #define S5PC100_VIC2_BASE 0xE4200000 |
| #define S5PC100_DMC_BASE 0xE6000000 |
| #define S5PC100_SROMC_BASE 0xE7000000 |
| #define S5PC100_ONENAND_BASE 0xE7100000 |
| #define S5PC100_PWMTIMER_BASE 0xEA000000 |
| #define S5PC100_WATCHDOG_BASE 0xEA200000 |
| #define S5PC100_UART_BASE 0xEC000000 |
| #define S5PC100_MMC_BASE 0xED800000 |
| |
| /* S5PC110 */ |
| #define S5PC110_PRO_ID 0xE0000000 |
| #define S5PC110_CLOCK_BASE 0xE0100000 |
| #define S5PC110_GPIO_BASE 0xE0200000 |
| #define S5PC110_PWMTIMER_BASE 0xE2500000 |
| #define S5PC110_WATCHDOG_BASE 0xE2700000 |
| #define S5PC110_UART_BASE 0xE2900000 |
| #define S5PC110_SROMC_BASE 0xE8000000 |
| #define S5PC110_MMC_BASE 0xEB000000 |
| #define S5PC110_DMC0_BASE 0xF0000000 |
| #define S5PC110_DMC1_BASE 0xF1400000 |
| #define S5PC110_VIC0_BASE 0xF2000000 |
| #define S5PC110_VIC1_BASE 0xF2100000 |
| #define S5PC110_VIC2_BASE 0xF2200000 |
| #define S5PC110_VIC3_BASE 0xF2300000 |
| #define S5PC110_OTG_BASE 0xEC000000 |
| #define S5PC110_PHY_BASE 0xEC100000 |
| #define S5PC110_USB_PHY_CONTROL 0xE010E80C |
| |
| |
| #ifndef __ASSEMBLY__ |
| #include <asm/io.h> |
| /* CPU detection macros */ |
| extern unsigned int s5p_cpu_id; |
| |
| static inline void s5p_set_cpu_id(void) |
| { |
| s5p_cpu_id = readl(S5PC100_PRO_ID); |
| s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12); |
| } |
| |
| static inline char *s5p_get_cpu_name(void) |
| { |
| return S5P_CPU_NAME; |
| } |
| |
| #define IS_SAMSUNG_TYPE(type, id) \ |
| static inline int cpu_is_##type(void) \ |
| { \ |
| return s5p_cpu_id == id ? 1 : 0; \ |
| } |
| |
| IS_SAMSUNG_TYPE(s5pc100, 0xc100) |
| IS_SAMSUNG_TYPE(s5pc110, 0xc110) |
| |
| #define SAMSUNG_BASE(device, base) \ |
| static inline unsigned int samsung_get_base_##device(void) \ |
| { \ |
| if (cpu_is_s5pc100()) \ |
| return S5PC100_##base; \ |
| else if (cpu_is_s5pc110()) \ |
| return S5PC110_##base; \ |
| else \ |
| return 0; \ |
| } |
| |
| SAMSUNG_BASE(clock, CLOCK_BASE) |
| SAMSUNG_BASE(gpio, GPIO_BASE) |
| SAMSUNG_BASE(pro_id, PRO_ID) |
| SAMSUNG_BASE(mmc, MMC_BASE) |
| SAMSUNG_BASE(sromc, SROMC_BASE) |
| SAMSUNG_BASE(timer, PWMTIMER_BASE) |
| SAMSUNG_BASE(uart, UART_BASE) |
| SAMSUNG_BASE(watchdog, WATCHDOG_BASE) |
| #endif |
| |
| #endif /* _S5PC1XX_CPU_H */ |
