| commit | ee406b212eabfe08e255f834270c908655495bc1 | [log] [tgz] |
|---|---|---|
| author | Yaron David <yarond@marvell.com> | Sun Jun 21 08:47:41 2015 +0300 |
| committer | Greg Poist <poist@google.com> | Thu Mar 24 11:59:54 2016 -0700 |
| tree | 28224ee4f8553524cc743151f4281d3f1b68532e | |
| parent | 963561791a90321e8d5d136d4dfb2d8070218f49 [diff] |
DDR: Fix warning in Training Algos code
- this warning is seen when using "-Wsign-compare" C flag
- Change the value of -1 to 0xFFFFFFFF in (ckDelay == -1)
Change-Id: Ibc819a8e06b81f8b9c263d79033a1e9b8467589d
Signed-off-by: Yaron David <yarond@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/20291
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Haim Boot <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24133
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingHwAlgos.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingHwAlgos.c index c989327..45b6be4 100755 --- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingHwAlgos.c +++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3TrainingHwAlgos.c
@@ -401,7 +401,7 @@ /* CA_delay is delaying the of the entire command & Address signals (include Clock signal � to overcome DGL error on the Clock versus the DQS). */ /*Calc ADLL Tap*/ - if(ckDelay == -1) + if(ckDelay == MV_PARAMS_UNDEFINED) { DEBUG_TRAINING_HW_ALG(DEBUG_LEVEL_ERROR,("ERROR: One of ckDelay values not initialized!!!\n")); }