fix: efuse: a38x, a39x: Fix the reserved rows invalidation pattern
- Change the pattern used for filling tester reserved efuse
rows 0-23. Instead of using all zeros in bits[63:0] and bit[64]=1,
set now bits[55:0] to ones, bits[63:56] to zeros and leave bit[64]=1.
- Using zeros as a content of efuse rows 0-23 causes HW engine make
unnecessary changes in configuration of internal SRAM regions
that belongs to SATA unit 0 port 0.
These changes prevent SATA port 0 from a normal operation.
- Ensure that the reserved efuse row written only if not previously
set by tester and skip rows already modified by tester.
Change-Id: I095ec4b050e4dfeb980f570e3749951a144adb29
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/23817
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Omri Itach <omrii@marvell.com>
1 file changed
