| commit | cbd0cf5a1b53fb851fe093dd1589860531f04d52 | [log] [tgz] |
|---|---|---|
| author | hayim <hayim@marvell.com> | Thu Aug 06 17:03:09 2015 +0300 |
| committer | Greg Poist <poist@google.com> | Thu Mar 24 11:59:54 2016 -0700 |
| tree | 4ac4ef3094ed8eb25c51accdd1ed05f3aa956b34 | |
| parent | 0277985b8271863728d10fbe22307b8a827d1a37 [diff] |
ddr3libv2: fix attribute assignment to right value type
ddr3TipDevAttrGet return 32 bit value and it was assigned
to 8 bit variable
Change-Id: I578dacd92ea1f37a87b1b940093dada39e555f7c
Signed-off-by: hayim <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/22604
Tested-by: Star_Automation <star@marvell.com>
Tested-by: Star_New_DDR <star-new-ddr@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24150
Reviewed-by: Omri Itach <omrii@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c index b32c9ca..6e7028c 100755 --- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c +++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Driver/ddr3/mvHwsDdr3Training.c
@@ -848,7 +848,7 @@ static GT_STATUS ddr3TipRev3RankControl(GT_U32 devNum, GT_U32 interfaceId) { GT_U32 dataValue = 0, busCnt; - GT_U8 octetsPerInterfaceNum = ddr3TipDevAttrGet(devNum, MV_ATTR_OCTET_PER_INTERFACE); + GT_U32 octetsPerInterfaceNum = ddr3TipDevAttrGet(devNum, MV_ATTR_OCTET_PER_INTERFACE); for (busCnt= 1; busCnt < octetsPerInterfaceNum; busCnt++) { VALIDATE_BUS_ACTIVE(topologyMap->activeBusMask, busCnt)