| commit | c02c853b774c708e7c2fde3612449b47b7b99580 | [log] [tgz] |
|---|---|---|
| author | Margarita Granov <margra@marvell.com> | Thu Sep 10 15:04:20 2015 +0300 |
| committer | Greg Poist <poist@google.com> | Thu Mar 24 11:59:54 2016 -0700 |
| tree | 6ce511d0689602ed288e80f4e937d6abb4d8aec9 | |
| parent | 95d9495a96bec665599740c99712cf16d929e20e [diff] |
ddr3libv2: Bump DDR3 TIP-1.43 Fix WL Supplementary flow to support 16bit controller (AC3) Change-Id: I60178a7364ea39d625f4915d058d2ac233d026c7 Signed-off-by: Margarita Granov <margra@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/23525 Tested-by: Star_Automation <star@marvell.com> Reviewed-by: Omri Itach <omrii@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/24164
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h index dfb600a..787db9e 100755 --- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h +++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h
@@ -54,7 +54,7 @@ #ifdef CONFIG_DDR4 #define DDR3_TIP_VERSION_STRING "DDR4 Training Sequence - Ver TIP-0.20." #else -#define DDR3_TIP_VERSION_STRING "DDR3 Training Sequence - Ver TIP-1.42." +#define DDR3_TIP_VERSION_STRING "DDR3 Training Sequence - Ver TIP-1.43." #endif #define MAX_CS_NUM (4)