tools/marvell/debugger_scripts/XDB/a38x_static.xdb

set option /memory=long


!print "Configure PCIe interface #1 to X1"
!print "Set the capabilities register"
SET VAL /SIZE=LONG 0xD004006C = 0x7AC12

!print "STEP-0 Configure the MUX select for PCIe-1 on Serdes Lane 2"
SET VAL /SIZE=LONG 0xD00183FC = 0x40

!print "STEP-1 Set values that should be constant from beginning of sequence"
SET VAL /SIZE=LONG 0xD0018350 = 0x04470004
SET VAL /SIZE=LONG 0xD0018354 = 0x00000058
SET VAL /SIZE=LONG 0xD001835C = 0x0000000D

!print "STEP-2 Assert reset"
! Nothing to do as both bit 13, 14 are asserted to reset by default

!print "STEP-3 Deassert reset"
SET VAL /SIZE=LONG 0xD0018350 = 0x04476004

!print "STEP-4"
SET VAL /SIZE=LONG 0xD00A1004 = 0x0000FC60

!print "STEP-5 PHY gen max"
SET VAL /SIZE=LONG 0xD00A1094 = 0x000017FF

!print "STEP-6"
SET VAL /SIZE=LONG 0xD00A1704 = 0x00000025

!7. Irrelevent - USB device mode only

!print "STEP-8, not needed - only for simulation"
!SET VAL /SIZE=LONG 0xD00A1200 = 0x00001000

!print "STEP-9 " ; bit 7 = 1.bit 6=0
SET VAL /SIZE=LONG 0xD00A113C = 0x0000A08A

!print "STEP-10, not needed - only for simulation"
!SET VAL /SIZE=LONG 0xD00A1144 = 0x00000304 ; check if we need to write to this register

!print "Release phy reset"
SET VAL /SIZE=LONG 0xD00A1704 = 0x00000024

!print "Enable PCIe interface"
SET VAL /SIZE=LONG 0xD0018204 = 0x0707C0F2
TCI DELAY 1000

! 667 MHZ DDR
PRINT "Starting DRAM initialization:"
! dram init
SET VAL /SIZE=LONG 0xD0001400 = 0x7B00CA28 !  DDR SDRAM Configuration Register
SET VAL /SIZE=LONG 0xD0001404 = 0x36301820 !  Dunit Control Low Register - kw40 bit11 high
SET VAL /SIZE=LONG 0xD0001408 = 0x43149997 !  DDR SDRAM Timing (Low) Register
SET VAL /SIZE=LONG 0xD000140C = 0x38411BC7 !  DDR SDRAM Timing (High) Register
SET VAL /SIZE=LONG 0xD0001410 = 0x14300000 !  DDR SDRAM Address Control Register
SET VAL /SIZE=LONG 0xD0001414 = 0x00000700 !  DDR SDRAM Open Pages Control Register
SET VAL /SIZE=LONG 0xD0001424 = 0x0060F3FF !  Dunit Control High Register ( 2 :1 - bits 15:12 = 0xD )
SET VAL /SIZE=LONG 0xD0001428 = 0x000F8830 !  Dunit Control High Register
SET VAL /SIZE=LONG 0xD000142C = 0x28C50F8 !  Dunit Control High Register  ( 2:1 -  bit 29 = '1' )
SET VAL /SIZE=LONG 0xD000147C = 0x0000C671 !

SET VAL /SIZE=LONG 0xD0001494 = 0x00030000 !  DDR SDRAM ODT Control (Low) Register
SET VAL /SIZE=LONG 0xD000149C = 0x00000300 !  DDR Dunit ODT Control Register

SET VAL /SIZE=LONG 0xD00014A8 = 0x00000000 !
SET VAL /SIZE=LONG 0xD00014CC = 0xBD09000D !
SET VAL /SIZE=LONG 0xD0001474 = 0x00000000 !

SET VAL /SIZE=LONG 0xD0001538 = 0x00000009 !  Read Data Sample Delays Register
SET VAL /SIZE=LONG 0xD000153C = 0x0000000C !  Read Data Ready Delay Register

SET VAL /SIZE=LONG 0xD0001504 = 0xFFFFFFF1 !
SET VAL /SIZE=LONG 0xD000150C = 0xFFFFFFE5 !
SET VAL /SIZE=LONG 0xD0001514 = 0x00000000 !
SET VAL /SIZE=LONG 0xD000151C = 0x0!

SET VAL /SIZE=LONG 0xD00015D0 = 0x00000650 !  MR0
SET VAL /SIZE=LONG 0xD00015D4 = 0x00000046 !  MR1
SET VAL /SIZE=LONG 0xD00015D8 = 0x00000010 !  MR2
SET VAL /SIZE=LONG 0xD00015DC = 0x00000000 !  MR3

SET VAL /SIZE=LONG 0xD00015E0 = 0x23 !
SET VAL /SIZE=LONG 0xD00015E4 = 0x00203C18!  ZQC Configuration Register
SET VAL /SIZE=LONG 0xD00015EC = 0xF8000019!  DDR PHY

PRINT " [Done]"

SET VAL /SIZE=LONG 0xD00016A0 = 0xE8243DFE ! ZNR / SPR
SET VAL /SIZE=LONG 0xD00016A0 = 0xE8280434 ! disable clamp	and Vref

SET VAL /SIZE=LONG 0xD00016A0 = 0x281020DA ! Clock skew
SET VAL /SIZE=LONG 0xD00016A0 = 0xE8260CB2
SET VAL /SIZE=LONG 0xD00016A0 = 0xE8290000
SET VAL /SIZE=LONG 0xD00016A0 = 0xF810001F

SET VAL /SIZE=LONG 0xD00016A0 = 0xC0005847


!	&status=Data.Long(SD:0xD00016A0)
!	&status=&status&(1<<31)
!	WHILE (&status>0)
!	(
!		&status=Data.Long(SD:0xD00016A0)
!		&status=&status&(1<<31)
!	)
DEFINE SYMBOL /TYPE="unsigned int" /ADDRESS=0xD00016A0 PrfaReq
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END


SET VAL /SIZE=LONG 0xD00016A0 = 0xC0406049
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC080704D
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC0C0A85B
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC002008D
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC0420084
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC082009f
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC0c20099
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC003000F
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC043000f
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC083000f
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD00016A0 = 0xC0C3000f
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

SET VAL /SIZE=LONG 0xD0001480 = 0x00000001 !  DDR SDRAM Initialization Control Register
TCI DELAY 2000

PRINT "Init Done :-)\n"

SET VAL /SIZE=LONG 0xD00015B0 = 0x80100008 ! WL
SET VAL /SIZE=LONG 0xD00015B0 = 0x80100002 ! Load pattern !
SET VAL /SIZE=LONG 0xD00015B0 = 0x80100040 ! RL

SET VAL /SIZE=LONG 0xD0018000 = 0x11 ! RL

SET VAL /SIZE=LONG 0xD00200E8 = 0x0! RL
SET VAL /SIZE=LONG 0xD0020184 = 0x0FFFFFE1 ! RL
SET VAL /SIZE=LONG 0xD00182E4 = 0xFFFDFFFF ! RL