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| ******************************************************************************* |
| * ddr3_a38x_training_static.h |
| * |
| * DESCRIPTION: |
| * |
| * |
| * FILE REVISION NUMBER: |
| * $Revision: 7 $ |
| * |
| *******************************************************************************/ |
| |
| #ifndef __ddr3_a38x_training_static_H |
| #define __ddr3_a38x_training_static_H |
| |
| #include <gtGenTypes.h> |
| #include <mvDdr3TrainingIpStatic.h> |
| #include <mvDdr3TrainingIp.h> |
| |
| #ifdef __cplusplus |
| extern "C" { |
| #endif |
| |
| /************************** Globals ******************************/ |
| |
| GT_U8 debugA38x = 0; |
| |
| static MV_DFX_ACCESS interfaceMap[] = |
| { |
| /* Pipe Client*/ |
| { 0, 17 }, |
| { 1, 7 }, |
| { 1, 11 }, |
| { 0, 3 }, |
| { 1, 25 }, |
| { 0, 0 }, |
| { 0, 0 }, |
| { 0, 0 }, |
| { 0, 0 }, |
| { 0, 0 }, |
| { 0, 0 }, |
| { 0, 0 } |
| }; |
| |
| |
| |
| /* this array hold the board round trip delay (DQ and CK) per <interfcae,bus> */ |
| TripDelayElement A38xBoardRoundTripDelayArray[] = |
| { |
| /* 1st board */ |
| /*interface bus DQS-delay CK-delay */ |
| { 3952,5060 }, |
| { 3192,4493 }, |
| { 4785,6677 }, |
| { 3413,7267 }, |
| { 4282,6086 }, /*ECC PUP*/ |
| { 3952,5134 }, |
| { 3192,4567 }, |
| { 4785,6751 }, |
| { 3413,7341 }, |
| { 4282,6160 }, /*ECC PUP*/ |
| |
| /* 2nd board */ |
| /*interface bus DQS-delay CK-delay */ |
| { 3952,5060 }, |
| { 3192,4493 }, |
| { 4785,6677 }, |
| { 3413,7267 }, |
| { 4282,6086 }, /*ECC PUP*/ |
| { 3952,5134 }, |
| { 3192,4567 }, |
| { 4785,6751 }, |
| { 3413,7341 }, |
| { 4282,6160 } /*ECC PUP*/ |
| }; |
| |
| /* package trace */ |
| TripDelayElement A38xPackageRoundTripDelayArray[] = |
| { |
| /*IF BUS DQ_DELYA CK_DELAY */ |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } , |
| { 0, 0 } |
| }; |
| |
| |
| GT_32 A38xSiliconDelayOffset[] = |
| { |
| /* board 0 */ |
| 0, |
| /* board 1 */ |
| 0, |
| /* board 2 */ |
| 0 |
| }; |
| |
| |
| GT_STATUS ddr3TipInitA38x |
| ( |
| GT_U32 devNum, |
| GT_U32 boardId |
| ); |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| |
| #endif /* __ddr3_a38x_training_static_H */ |