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| ******************************************************************************* |
| * ddr3_a38x_training_static.h |
| * |
| * DESCRIPTION: |
| * |
| * |
| * FILE REVISION NUMBER: |
| * $Revision: 7 $ |
| * |
| *******************************************************************************/ |
| |
| #ifndef __ddr3_a38x_training_static_H |
| #define __ddr3_a38x_training_static_H |
| |
| #ifdef __cplusplus |
| extern "C" { |
| #endif |
| |
| /* STATIC_TRAINING - Set only if static parameters for training are set and required */ |
| /*#define STATIC_TRAINING */ |
| typedef struct __mvDramTrainingInit { |
| MV_U32 reg_addr; |
| MV_U32 reg_value; |
| } MV_DRAM_TRAINING_INIT; |
| |
| MV_DRAM_TRAINING_INIT ddr3_db_a38x[MV_MAX_DDR3_STATIC_SIZE] = |
| { |
| /*HW mechanizem*/ |
| /* WL training*/ |
| {0x000015B0, 0x80100008}, |
| /* Preload training pattern to DRAM*/ |
| {0x000015B0, 0x80100002}, |
| /* Read Leveling using training pattern at high frequency*/ |
| {0x000015B0, 0x80100040}, |
| {0x000200e8, 0x0}, /* RL */ |
| {0x00008c04, 0x80000000}, /* Filtering register patch(value bigger that DRAM size)*/ |
| {0x00020184, 0x7FFFFFE1}, /* WIN0 2G*/ |
| {0x0, 0x0} |
| }; |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| |
| #endif /* __ddr3_a38x_training_static_H */ |
