tools/marvell/debugger_scripts/XDB/a370_static.xdb

! dram init
!Data.Set 0xD0001400 %LONG 0x73014A28 ;  DDR SDRAM Configuration Register
SET VAL /SIZE=LONG 0xD0001400 = 0x73014A28

!Data.Set 0xD0001404 %LONG 0x3630B800 ;  Dunit Control Low Register - kw40 bit11 high
SET VAL /SIZE=LONG 0xD0001404 = 0x3630B800

!Data.Set 0xD0001408 %LONG 0x44149887 ;  DDR SDRAM Timing (Low) Register
SET VAL /SIZE=LONG 0xD0001408 = 0x44149887

!Data.Set 0xD000140C %LONG 0x38000C6A ;  DDR SDRAM Timing (High) Register
SET VAL /SIZE=LONG 0xD000140C = 0x38000C6A

!Data.Set 0xD0001410 %LONG 0x04000000 ;  DDR SDRAM Address Control Register
SET VAL /SIZE=LONG 0xD0001410 = 0x04000000

!Data.Set 0xD0001414 %LONG 0x00000000 ;  DDR SDRAM Open Pages Control Register
SET VAL /SIZE=LONG 0xD0001414 = 0x00000000

!Data.Set 0xD0001418 %LONG 0x00000E00 ;  DDR SDRAM Operation Register
SET VAL /SIZE=LONG 0xD0001418 = 0x00000E00

!Data.Set 0xD000141C %LONG 0x00000672 ;  DDR SDRAM Mode Register
SET VAL /SIZE=LONG 0xD000141C = 0x00000672

!Data.Set 0xD0001420 %LONG 0x00000004 ;  DDR SDRAM Extended Mode Register
SET VAL /SIZE=LONG 0xD0001420 = 0x00000004

!Data.Set 0xD0001424 %LONG 0x0100D1FF ;  Dunit Control High Register ( 2 :1 - bits 15:12 = 0xD )
SET VAL /SIZE=LONG 0xD0001424 = 0x0100D1FF

!Data.Set 0xD0001428 %LONG 0x000F8830 ;  Dunit Control High Register
SET VAL /SIZE=LONG 0xD0001428 = 0x000F8830

!Data.Set 0xD000142C %LONG 0x214C2F38 ;  Dunit Control High Register  ( 2:1 -  bit 29 = '1' )
SET VAL /SIZE=LONG 0xD000142C = 0x214C2F38

!Data.Set 0xD000147C %LONG 0x0000C671 ;
SET VAL /SIZE=LONG 0xD000147C = 0x0000C671

! 2:1
!Data.Set 0xD00014A8 %LONG 0x00000100 ; DSMP "101"
SET VAL /SIZE=LONG 0xD00014A8 = 0x00000100

!Data.Set 0xD0020220 %LONG 0x00000006 ; DSMP 7
SET VAL /SIZE=LONG 0xD0020220 = 0x00000006

!Data.Set 0xD0001494 %LONG 0x00010000 ;  DDR SDRAM ODT Control (Low) Register
SET VAL /SIZE=LONG 0xD0001494 = 0x00010000

!Data.Set 0xD0001498 %LONG 0x00000000 ;  DDR SDRAM ODT Control (High) Register
SET VAL /SIZE=LONG 0xD0001498 = 0x00000000

!Data.Set 0xD000149C %LONG 0x00000001 ;  DDR Dunit ODT Control Register
SET VAL /SIZE=LONG 0xD000149C = 0x00000001


! First work with Mbus DRAM window at DRAM Init - 256MB in default
!Data.Set 0xD00200EC %LONG 0x00000000
SET VAL /SIZE=LONG 0xD00200EC = 0x00000000

!Data.Set 0xD00200E8 %LONG 0x1FFF0E00
SET VAL /SIZE=LONG 0xD00200E8 = 0x1FFF0E00

!Data.Set 0xD0020184 %LONG 0x1FFFFFE1
SET VAL /SIZE=LONG 0xD0020184 = 0x1FFFFFE1

! Those registers should not be connected in this device, so just to be sure we will Zero them
!Data.Set 0xD0001504 %LONG 0x1FFFFFF1 ;
SET VAL /SIZE=LONG 0xD0001504 = 0x1FFFFFF1

!Data.Set 0xD000150C %LONG 0x00000000 ;  CS[1]n Size Register
SET VAL /SIZE=LONG 0xD000150C = 0x00000000

!Data.Set 0xD0001514 %LONG 0x00000000 ;  CS[2]n Size Register
SET VAL /SIZE=LONG 0xD0001514 = 0x00000000

!Data.Set 0xD000151C %LONG 0x00000000 ;  CS[3]n Size Register
SET VAL /SIZE=LONG 0xD000151C = 0x00000000

!Data.Set 0xD0001524 %LONG 0x0000C800 ;  DDR I/O register
SET VAL /SIZE=LONG 0xD0001524 = 0x0000C800

!Data.Set 0xD0001538 %LONG 0x0000000B ;  Read Data Sample Delays Register
SET VAL /SIZE=LONG 0xD0001538 = 0x0000000B

!Data.Set 0xD000153C %LONG 0x0000000D ;  Read Data Ready Delay Register
SET VAL /SIZE=LONG 0xD000153C = 0x0000000D

!Data.Set 0xD00015D0 %LONG 0x00000650 ;  MR0
SET VAL /SIZE=LONG 0xD00015D0 = 0x00000650

!Data.Set 0xD00015D4 %LONG 0x00000046 ;  MR1
SET VAL /SIZE=LONG 0xD00015D4 = 0x00000046

!Data.Set 0xD00015D8 %LONG 0x00000010 ;  MR2
SET VAL /SIZE=LONG 0xD00015D8 = 0x00000010

!Data.Set 0xD00015DC %LONG 0x00000000 ;  MR3
SET VAL /SIZE=LONG 0xD00015DC = 0x00000000

!Data.Set 0xD00015E4 %LONG 0x00203C18;  ZQC Configuration Register
SET VAL /SIZE=LONG 0xD00015E4 = 0x00203C18

!Data.Set 0xD00015EC %LONG 0xDE000025;  DDR PHY
SET VAL /SIZE=LONG 0xD00015EC = 0xDE000025

DEFINE SYMBOL /TYPE="unsigned int" /ADDRESS=0xD00016A0 PrfaReq
!;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
!;read leveling values
!;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

!;PUP	RdSampleDly (+CL)	Phase	RL ADLL value
!;0		1		1		25
!Data.Set 0xD00016A0 %LONG 0xC0020014
SET VAL /SIZE=LONG 0xD00016A0 = 0xC0020014

!&status=Data.Long(SD:0xD00016A0)
!&status=&status&(1<<31)
!WHILE (&status>0)
!(
!	&status=Data.Long(SD:0xD00016A0)
!	&status=&status&(1<<31)
!)
WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

!;1		1		1		30
!Data.Set 0xD00016A0 %LONG 0xC0420019
SET VAL /SIZE=LONG 0xD00016A0 = 0xC0420019

WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

!;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

!;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
!;write leveling values
!;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

!;PUP
!;0

!Data.Set 0xD00016A0 %LONG 0xC0008414
SET VAL /SIZE=LONG 0xD00016A0 = 0xC0008414

WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

!;1

!Data.Set 0xD00016A0 %LONG 0xC0404905
SET VAL /SIZE=LONG 0xD00016A0 = 0xC0404905

WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END

!;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

!; center DQS on read cycle
!Data.Set 0xD00016A0 %LONG 0xC803000F
SET VAL /SIZE=LONG 0xD00016A0 = 0xC803000F

WHILE PrfaReq & 0x80000000 THEN
    TCI DELAY 1
END


!Data.Set 0xD0001480 %LONG 0x00000001 ;  DDR SDRAM Initialization Control Register
SET VAL /SIZE=LONG 0xD0001480 = 0x00000001

!WAIT 1.s
TCI DELAY 1000

PRINT "DDR3 Init Done!\n"