a38x: add support for SolidRun's ClearFog-A1 board
- added support for a new 'customer' pre-compiled option for
SolidRun's ClearFog A0 board
- compiled with './build.pl -b armada_38x_clearfog -f mmc'
- Predefined binary header configuration:
* Skip AVS selection from pre-burnt EFUSE values
* DDR: increased internal CK delay due to short traces
- Added full U-Boot board structures, including new GPP
routine callback to reset PHY & Switch via GPIOs
Change-Id: I16e70a64608cb0630f723568a2fb3d6adf0f5f6c
Signed-off-by: Omri Itach <omrii@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/23479
diff --git a/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvLib.c b/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvLib.c
index 7b87cee..eb6f5bf 100644
--- a/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvLib.c
+++ b/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvLib.c
@@ -2222,6 +2222,8 @@
gBoardId = CUSTOMER_BOARD_ID0;
#elif CONFIG_CUSTOMER_BOARD_1
gBoardId = CUSTOMER_BOARD_ID1;
+ #elif CONFIG_CLEARFOG_BOARD
+ gBoardId = A38X_CLEARFOG_BOARD_ID;
#endif
#else /* !CONFIG_CUSTOMER_BOARD_SUPPORT */
/* Temporarily set generic board struct pointer, to set/get EEPROM i2c address, and read board ID */
diff --git a/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec.h b/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec.h
index 00d95a7..86983ee 100644
--- a/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec.h
+++ b/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec.h
@@ -83,7 +83,8 @@
#define A38X_CUTOMER_BOARD_ID_BASE 0x0
#define A38X_CUSTOMER_BOARD_ID0 (A38X_CUTOMER_BOARD_ID_BASE + 0)
#define A38X_CUSTOMER_BOARD_ID1 (A38X_CUTOMER_BOARD_ID_BASE + 1)
-#define A38X_MV_MAX_CUSTOMER_BOARD_ID (A38X_CUTOMER_BOARD_ID_BASE + 2)
+#define A38X_CLEARFOG_BOARD_ID (A38X_CUTOMER_BOARD_ID_BASE + 2)
+#define A38X_MV_MAX_CUSTOMER_BOARD_ID (A38X_CUTOMER_BOARD_ID_BASE + 3)
#define A38X_MV_CUSTOMER_BOARD_NUM (A38X_MV_MAX_CUSTOMER_BOARD_ID - A38X_CUTOMER_BOARD_ID_BASE)
/* Armada-38x Marvell boards */
diff --git a/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec38x.c b/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec38x.c
index 852db1a..7fd5ca2 100644
--- a/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec38x.c
+++ b/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec38x.c
@@ -66,6 +66,7 @@
#include "boardEnv/mvBoardEnvSpec.h"
#include "twsi/mvTwsi.h"
#include "pex/mvPexRegs.h"
+#include "gpp/mvGppRegs.h"
/***************************************** Customer Boards *****************************************/
/*******************************************************************************
@@ -271,6 +272,7 @@
{1, 3, 0xC0} /* Output Data, register#1 */
};
+
MV_BOARD_GPP_INFO armada_38x_customer_1_GppInfo[] = {
/* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */
/* USB_Host0 *//* //{BOARD_GPP_USB_VBUS, 44},*/ /* from MPP map */
@@ -353,12 +355,175 @@
.switchInfoNum = 0
};
+/*******************************************************************************
+ * A38x SolidRun ClearFog
+ *******************************************************************************/
+MV_BOARD_TWSI_INFO armada_38x_clearfog_BoardTwsiDev[] = {
+ /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 devClassId, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */
+ { BOARD_TWSI_IO_EXPANDER, 0, 0x20, ADDR7_BIT, MV_FALSE},
+};
+MV_BOARD_MAC_INFO armada_38x_clearfog_BoardMacInfo[] = {
+ /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_32 boardEthSmiAddr ,
+ MV_32 boardEthSmiAddr0 , MV_BOOL boardMacEnabled;}} */
+ { BOARD_MAC_SPEED_AUTO, 0x0, 0x0, MV_TRUE},
+ { BOARD_MAC_SPEED_1000M, -1, -1, MV_TRUE},
+ { BOARD_MAC_SPEED_AUTO, -1, -1, MV_TRUE}
+};
+
+MV_DEV_CS_INFO armada_38x_clearfog_BoardDeCsInfo[] = {
+ /*{deviceCS, params, devType, devWidth, busWidth, busNum, active }*/
+ { DEVICE_CS0, N_A, BOARD_DEV_NAND_FLASH, 8, 8, 0, MV_FALSE }, /* NAND DEV */
+ { DEVICE_CS1, N_A, BOARD_DEV_NAND_FLASH, 8, 8, 0, MV_FALSE }, /* NAND DEV */
+ { DEVICE_CS2, N_A, BOARD_DEV_NAND_FLASH, 8, 8, 0, MV_FALSE }, /* NAND DEV */
+ { DEVICE_CS3, N_A, BOARD_DEV_NAND_FLASH, 8, 8, 0, MV_FALSE }, /* NAND DEV */
+ { DEV_BOOCS, N_A, BOARD_DEV_NOR_FLASH, 16, 16, 0, MV_FALSE }, /* NOR DEV */
+ { SPI0_CS0, N_A, BOARD_DEV_SPI_FLASH, 8, 8, 0, MV_FALSE }, /* SPI0 DEV */
+ { SPI0_CS1, N_A, BOARD_DEV_SPI_FLASH, 8, 8, 0, MV_FALSE }, /* SPI0 DEV */
+ { SPI0_CS2, N_A, BOARD_DEV_SPI_FLASH, 8, 8, 0, MV_FALSE }, /* SPI0 DEV */
+ { SPI0_CS3, N_A, BOARD_DEV_SPI_FLASH, 8, 8, 0, MV_FALSE }, /* SPI0 DEV */
+ { SPI1_CS0, N_A, BOARD_DEV_SPI_FLASH, 8, 8, 1, MV_TRUE }, /* SPI1 DEV */
+ { SPI1_CS1, N_A, BOARD_DEV_SPI_FLASH, 8, 8, 1, MV_FALSE }, /* SPI1 DEV */
+ { SPI1_CS2, N_A, BOARD_DEV_SPI_FLASH, 8, 8, 1, MV_FALSE }, /* SPI1 DEV */
+ { SPI1_CS3, N_A, BOARD_DEV_SPI_FLASH, 8, 8, 1, MV_FALSE } /* SPI1 DEV */
+};
+
+MV_BOARD_MPP_INFO armada_38x_clearfog_BoardMppConfigValue[] = {
+ { {
+ A38x_CLEARFOG_BOARD_MPP0_7,
+ A38x_CLEARFOG_BOARD_MPP8_15,
+ A38x_CLEARFOG_BOARD_MPP16_23,
+ A38x_CLEARFOG_BOARD_MPP24_31,
+ A38x_CLEARFOG_BOARD_MPP32_39,
+ A38x_CLEARFOG_BOARD_MPP40_47,
+ A38x_CLEARFOG_BOARD_MPP48_55,
+ A38x_CLEARFOG_BOARD_MPP56_63,
+ } }
+};
+
+struct MV_BOARD_IO_EXPANDER armada_38x_clearfog_IoExpanderInfo[] = {
+ {0, 2, 0x40}, /* Deassert both mini pcie reset signals */
+ {0, 6, 0xf9},
+ {0, 2, 0x46}, /* Assert reset signals and enable USB3 current limiter */
+ {0, 6, 0xb9},
+ {0, 3, 0x0}, /* Set SFP_TX_DIS to zero */
+ {0, 7, 0xbf}, /* Drive SFP_TX_DIS to zero */
+};
+
+MV_BOARD_USB_INFO armada_38x_clearfog_InfoBoardUsbInfo[] = {
+/* {MV_UNIT_ID usbType, MV_U8 usbPortNum, MV_BOOL isActive} */
+ { USB3_UNIT_ID, 0, MV_TRUE},
+ { USB3_UNIT_ID, 1, MV_TRUE}, /* xHCI port#1 connected only via USB2.0 UTMI (not via USB3.0 SerDes lane) */
+ { USB_UNIT_ID, 0, MV_TRUE},
+};
+
+struct MV_BOARD_SWITCH_INFO armada_38x_clearfog_InfoSwitchInfo[] = {
+ {
+ .isEnabled = MV_TRUE,
+ .isCpuPortRgmii = MV_FALSE,
+ .switchIrq = -1, /* set to -1 for using PPU*/
+ .switchPort = {0, 1, 2, 3, 4, 5, 6},
+ .cpuPort = 5,
+ .connectedPort = {-1, 5, -1},
+ .smiScanMode = MV_SWITCH_SMI_MULTI_ADDR_MODE,
+ .quadPhyAddr = 4,
+ .forceLinkMask = 0x60
+ }
+};
+
+MV_BOARD_IO_EXPANDER_TYPE_INFO armada_38x_clearfog_ioExpPinInfo[] = {
+/* { IO Type enum, bit offset, Io.exp num, reg Num */
+ { MV_IO_EXPANDER_USB_VBUS, 6, 0, 2} /* VBUS_EN: IO.exp#1 (0x21), reg #3, bit 7 */
+};
+
+void A38x_CLEARFOG_BOARD_gpp_callback(MV_BOARD_INFO *board) {
+ /* Toggle GPIO41 to reset on-board switch and phy */
+ /* Set GPIO41 as output enabled */
+ MV_REG_BIT_RESET (GPP_DATA_OUT_REG(1), BIT9);
+ /* reset output value */
+ MV_REG_BIT_RESET (GPP_DATA_OUT_EN_REG(1), BIT9);
+ /* set output value */
+ mvOsDelay(1);
+ MV_REG_BIT_SET (GPP_DATA_OUT_EN_REG(1), BIT9);
+ mvOsDelay(10);
+
+ /* update on-Board IO expander with pre-defined values:
+ * USB3 current limiter, and SFP_TX_DIS, Deassert and assert 2*mini PCIe reset signals, */
+ mvBoardIoExpanderUpdate();
+}
+
+MV_BOARD_INFO armada_38x_clearfog_board_info = {
+ .boardName = "SolidRun ClearFog-A1 REV2.0",
+ .numBoardNetComplexValue = 0,
+ .pBoardNetComplexInfo = NULL,
+ .pBoardMppConfigValue = armada_38x_clearfog_BoardMppConfigValue,
+ .intsGppMaskLow = 0,
+ .intsGppMaskMid = 0,
+ .intsGppMaskHigh = 0,
+ .numBoardDeviceIf = ARRSZ(armada_38x_clearfog_BoardDeCsInfo),
+ .pDevCsInfo = armada_38x_clearfog_BoardDeCsInfo,
+ .numBoardTwsiDev = ARRSZ(armada_38x_clearfog_BoardTwsiDev),
+ .pBoardTwsiDev = armada_38x_clearfog_BoardTwsiDev,
+ .numBoardMacInfo = ARRSZ(armada_38x_clearfog_BoardMacInfo),
+ .pBoardMacInfo = armada_38x_clearfog_BoardMacInfo,
+ .numBoardGppInfo = 0,
+ .pBoardGppInfo = 0,
+ .numBoardIoExpPinInfo = ARRSZ(armada_38x_clearfog_ioExpPinInfo),
+ .pBoardIoExpPinInfo = armada_38x_clearfog_ioExpPinInfo,
+ .activeLedsNumber = 0,
+ .pLedGppPin = NULL,
+ .ledsPolarity = 0,
+
+ /* PMU Power */
+ .pmuPwrUpPolarity = 0,
+ .pmuPwrUpDelay = 80000,
+
+ /* GPP values */
+ .gppOutEnValLow = A38x_CLEARFOG_BOARD_GPP_OUT_ENA_LOW,
+ .gppOutEnValMid = A38x_CLEARFOG_BOARD_GPP_OUT_ENA_MID,
+ .gppOutValLow = A38x_CLEARFOG_BOARD_GPP_OUT_VAL_LOW,
+ .gppOutValMid = A38x_CLEARFOG_BOARD_GPP_OUT_VAL_MID,
+ .gppPolarityValLow = A38x_CLEARFOG_BOARD_GPP_POL_LOW,
+ .gppPolarityValMid = A38x_CLEARFOG_BOARD_GPP_POL_MID,
+ .gppPostConfigCallBack = A38x_CLEARFOG_BOARD_gpp_callback,
+
+ /* TDM */
+ .numBoardTdmInfo = {},
+ .pBoardTdmInt2CsInfo = {},
+ .boardTdmInfoIndex = -1,
+
+ .pBoardSpecInit = NULL,
+
+ .pBoardUsbInfo = armada_38x_clearfog_InfoBoardUsbInfo,
+ .numBoardUsbInfo = ARRSZ(armada_38x_clearfog_InfoBoardUsbInfo),
+
+ /* NAND init params */
+ .nandFlashReadParams = 0,
+ .nandFlashWriteParams = 0,
+ .nandFlashControl = 0,
+ .nandIfMode = NAND_IF_NFC,
+
+ .isSdMmcConnected = MV_TRUE,
+
+ /* NOR init params */
+ .norFlashReadParams = 0,
+ .norFlashWriteParams = 0,
+ /* Enable modules auto-detection. */
+ .configAutoDetect = MV_FALSE,
+ .numIoExp = ARRSZ(armada_38x_clearfog_IoExpanderInfo),
+ .pIoExp = armada_38x_clearfog_IoExpanderInfo,
+ .boardOptionsModule = MV_MODULE_NO_MODULE,
+ .isAmc = MV_FALSE,
+ .pSwitchInfo = armada_38x_clearfog_InfoSwitchInfo,
+ .switchInfoNum = ARRSZ(armada_38x_clearfog_InfoSwitchInfo)
+};
+
/*
* All supported A380 customer boards
*/
MV_BOARD_INFO *customerBoardInfoTbl[] = {
&armada_38x_customer_board_0_info,
- &armada_38x_customer_board_1_info
+ &armada_38x_customer_board_1_info,
+ &armada_38x_clearfog_board_info
};
diff --git a/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec38x.h b/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec38x.h
index 8b65364..45bab59 100644
--- a/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec38x.h
+++ b/board/mv_ebu/a38x/armada_38x_family/boardEnv/mvBoardEnvSpec38x.h
@@ -119,6 +119,29 @@
#define A38x_CUSTOMER_BOARD_1_GPP_POL_LOW 0x0
#define A38x_CUSTOMER_BOARD_1_GPP_POL_MID 0x0
+
+/******************************* SolidRun Board *******************************/
+/*******************************************************************************
+ * SolidRun ClearFog-A1 REV2.0 */
+/******************************************************************************/
+#define A38x_CLEARFOG_BOARD_MPP0_7 0x11111111
+#define A38x_CLEARFOG_BOARD_MPP8_15 0x11111111
+#define A38x_CLEARFOG_BOARD_MPP16_23 0x10460011
+#define A38x_CLEARFOG_BOARD_MPP24_31 0x22043333
+#define A38x_CLEARFOG_BOARD_MPP32_39 0x44400002
+#define A38x_CLEARFOG_BOARD_MPP40_47 0x41144004
+#define A38x_CLEARFOG_BOARD_MPP48_55 0x45333333
+#define A38x_CLEARFOG_BOARD_MPP56_63 0x00004444
+
+#define A38x_CLEARFOG_BOARD_GPP_OUT_ENA_LOW 0xFFFFFFFF
+#define A38x_CLEARFOG_BOARD_GPP_OUT_ENA_MID 0xFFFFFFFF
+
+#define A38x_CLEARFOG_BOARD_GPP_OUT_VAL_LOW 0x0
+#define A38x_CLEARFOG_BOARD_GPP_OUT_VAL_MID 0x0
+#define A38x_CLEARFOG_BOARD_GPP_POL_LOW 0x0
+#define A38x_CLEARFOG_BOARD_GPP_POL_MID 0x0
+
+
/******************************* Marvell Boards *******************************/
/*******************************************************************************
diff --git a/boards.cfg b/boards.cfg
index 73fcd9a..a2159f8 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -54,6 +54,7 @@
armada_38x arm armv7 a38x mv_ebu mvca9 armada_38x:ARMADA_38X
armada_38x_customer0 arm armv7 a38x mv_ebu mvca9 armada_38x:CUSTOMER_BOARD_0,ARMADA_38X
armada_38x_customer1 arm armv7 a38x mv_ebu mvca9 armada_38x:CUSTOMER_BOARD_1,ARMADA_38X
+armada_38x_clearfog arm armv7 a38x mv_ebu mvca9 armada_38x:CLEARFOG_BOARD,ARMADA_38X
armada_39x arm armv7 a38x mv_ebu mvca9 armada_38x:ARMADA_39X
armada_39x_customer0 arm armv7 a38x mv_ebu mvca9 armada_38x:CUSTOMER_BOARD_0,ARMADA_39X
armada_39x_customer1 arm armv7 a38x mv_ebu mvca9 armada_38x:CUSTOMER_BOARD_1,ARMADA_39X
diff --git a/build.pl b/build.pl
index be9e5b9..e9712f9 100755
--- a/build.pl
+++ b/build.pl
@@ -13,7 +13,7 @@
print "Options:\n";
print "\t-f\tBoot device. Accepts spi, nor, nand, mmc\n";
print "\t-b\tBoard type. Accepts:\tavanta_lp , avanta_lp_customer0 , avanta_lp_customer1\n";
- print "\t\t\t\t\tarmada_38x, armada_38x_customer0, armada_38x_customer1\n";
+ print "\t\t\t\t\tarmada_38x, armada_38x_clearfog, armada_38x_customer0, armada_38x_customer1\n";
print "\t\t\t\t\tarmada_39x, armada_39x_customer0, armada_39x_customer1\n";
print "\t\t\t\t\tarmada_375, armada_375_customer0, armada_375_customer1\n";
print "\t\t\t\t\tbobcat2_db, bobcat2_rd, bobcat2_customer0, bobcat2_customer1\n";
@@ -93,6 +93,7 @@
($opt_b eq "armada_375_customer0") or
($opt_b eq "armada_375_customer1") or
($opt_b eq "armada_38x") or
+ ($opt_b eq "armada_38x_clearfog") or
($opt_b eq "armada_38x_customer0") or
($opt_b eq "armada_38x_customer1") or
($opt_b eq "armada_39x") or
@@ -137,10 +138,11 @@
$boardID="msys-ac3";
$targetBoard = substr $board, 8;
}
- # if board string contains "customer", use customer define for binary_header
- if (index($board, "customer") != -1){
+ # if board string contains "customer" (Or A38x-SolidRun Clear fog board), use customer define for binary_header
+ if ((index($board, "customer") != -1) or (index($board, "clearfog") != -1)) {
system("echo \"#define CONFIG_CUSTOMER_BOARD_SUPPORT 1\" >> include/config.h");
}
+
}
else
{
diff --git a/include/configs/armada_38x.h b/include/configs/armada_38x.h
index 3bfe102..9ef8da3 100644
--- a/include/configs/armada_38x.h
+++ b/include/configs/armada_38x.h
@@ -68,7 +68,7 @@
#define MV_DDR_64BIT
#define MV_BOOTROM
-#if defined (CONFIG_CUSTOMER_BOARD_0) || defined (CONFIG_CUSTOMER_BOARD_1)
+#if defined (CONFIG_CUSTOMER_BOARD_0) || defined (CONFIG_CUSTOMER_BOARD_1) || defined (CONFIG_CLEARFOG_BOARD)
#define CONFIG_CUSTOMER_BOARD_SUPPORT
#endif
@@ -508,8 +508,13 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_ISO_PARTITION
#define ENV_USB0_MODE "host"
+#ifdef CONFIG_CLEARFOG_BOARD
+ #define ENV_USB_ACTIVE "1"
+ #define ENV_USB_MODE "3" /* 3 = USB3.0 | 2 = USB2.0 */
+#else
#define ENV_USB_ACTIVE "0"
#define ENV_USB_MODE "2" /* 3 = USB3.0 | 2 = USB2.0 */
+#endif
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
diff --git a/tools/marvell/bin_hdr/base.mk b/tools/marvell/bin_hdr/base.mk
index 98527d2..9f8404b 100755
--- a/tools/marvell/bin_hdr/base.mk
+++ b/tools/marvell/bin_hdr/base.mk
@@ -83,6 +83,9 @@
ifeq "$(CONFIG_CUSTOMER_BOARD_1)" "y"
CFLAGS += -DCONFIG_CUSTOMER_BOARD_1
endif
+ifeq "$(CONFIG_CLEARFOG_BOARD)" "y"
+ CFLAGS += -DCONFIG_CLEARFOG_BOARD
+endif
# AXP
ifeq "$(CONFIG_DB_78x60_BP_REV2)" "y"
diff --git a/tools/marvell/bin_hdr/inc/ddr3_soc/a38x/ddr3_a38x.h b/tools/marvell/bin_hdr/inc/ddr3_soc/a38x/ddr3_a38x.h
index 8271286..c191552 100644
--- a/tools/marvell/bin_hdr/inc/ddr3_soc/a38x/ddr3_a38x.h
+++ b/tools/marvell/bin_hdr/inc/ddr3_soc/a38x/ddr3_a38x.h
@@ -76,15 +76,23 @@
#define MV_DDR_TOPOLOGY_UPDATE_FROM_TWSI
#endif
-#define CONFIG_AVS_FROM_EFUSE /* Read pre-burnt EFUSE values, to derive requested AVS value for current chip */
+#ifndef CONFIG_CLEARFOG_BOARD /* clear fog board has no pre-burnt AVS values on EFUSE */
+ #define CONFIG_AVS_FROM_EFUSE /* Read pre-burnt EFUSE values, to derive requested AVS value for current chip */
+#endif
#define ECC_SUPPORT
/*Controler bus divider 1 for 32 bit, 2 for 64 bit*/
#define MV_DDR_CONTROLLER_BUS_WIDTH_MULTIPLIER 1
/*Tune internal training params values*/
-#define MV_TUNE_TRAINING_PARAMS_CK_DELAY 160
-#define MV_TUNE_TRAINING_PARAMS_PHYREG3VAL 0xA
+#ifdef CONFIG_CLEARFOG_BOARD
+ /* SolidRun Armada 38x MicroSOM has short traces on it's DDR clock.
+ using increased internal delay inside the SoC to compensate for that */
+ #define MV_TUNE_TRAINING_PARAMS_CK_DELAY 260
+#else
+ #define MV_TUNE_TRAINING_PARAMS_CK_DELAY 160
+#endif
+#define MV_TUNE_TRAINING_PARAMS_PHYREG3VAL 0xA
#define MV_TUNE_TRAINING_PARAMS_PRI_DATA 123
#define MV_TUNE_TRAINING_PARAMS_NRI_DATA 123
diff --git a/tools/marvell/bin_hdr/inc/ddr3_soc/a38x/ddr3_a38x_topology.h b/tools/marvell/bin_hdr/inc/ddr3_soc/a38x/ddr3_a38x_topology.h
index d18ed3c..bbea7ec 100755
--- a/tools/marvell/bin_hdr/inc/ddr3_soc/a38x/ddr3_a38x_topology.h
+++ b/tools/marvell/bin_hdr/inc/ddr3_soc/a38x/ddr3_a38x_topology.h
@@ -82,6 +82,8 @@
#define BUS_WIDTH_CUST_BOARD_1 BUS_WIDTH_8
#define SPEED_BIN_DDR_CUST_BOARD_2 SPEED_BIN_DDR_1866L
#define BUS_WIDTH_CUST_BOARD_2 BUS_WIDTH_8
+ #define SPEED_BIN_DDR_CLEARFOG_BOARD SPEED_BIN_DDR_1600K
+ #define BUS_WIDTH_CLEARFOG_BOARD BUS_WIDTH_16
#define SPEED_BIN_DDR_DB_68XX SPEED_BIN_DDR_1866L
#define BUS_WIDTH_DB_68XX BUS_WIDTH_8
@@ -112,12 +114,19 @@
{{{{0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}}, SPEED_BIN_DDR_CUST_BOARD_1, BUS_WIDTH_CUST_BOARD_1 , MEM_4G, DDR_FREQ_800, 0 , 0 , MV_HWS_TEMP_LOW}},
INTERFACE_BUS_MASK_32BIT /* Buses mask */
},
- /* 2nd Customer board */
+ /* 2nd Customer board - GP Board*/
{
0x1, /* active interfaces */
/*cs_mask, mirror, dqs_swap, ck_swap X PUPs speed_bin memory_device_width mem_size frequency casL casWL temperature */
{{{{0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}}, SPEED_BIN_DDR_CUST_BOARD_2, BUS_WIDTH_CUST_BOARD_2 , MEM_4G, DDR_FREQ_800, 0 , 0 , MV_HWS_TEMP_LOW}},
INTERFACE_BUS_MASK_32BIT /* Buses mask */
+ },
+ /* 3rd Customer board - SolidRun ClearFog-A1 REV2.0 */
+ {
+ 0x1, /* active interfaces */
+ /*cs_mask, mirror, dqs_swap, ck_swap X PUPs speed_bin memory_device_width mem_size frequency casL casWL temperature */
+ {{{{0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}, {0x1,0,0,0}}, SPEED_BIN_DDR_CLEARFOG_BOARD, BUS_WIDTH_CLEARFOG_BOARD , MEM_4G, DDR_FREQ_800, 0 , 0 , MV_HWS_TEMP_LOW}},
+ INTERFACE_BUS_MASK_32BIT /* Buses mask */
}
};
diff --git a/tools/marvell/bin_hdr/platform/sysEnv/a38x/mvSysEnvLib.c b/tools/marvell/bin_hdr/platform/sysEnv/a38x/mvSysEnvLib.c
index a0b908c..f92887c 100755
--- a/tools/marvell/bin_hdr/platform/sysEnv/a38x/mvSysEnvLib.c
+++ b/tools/marvell/bin_hdr/platform/sysEnv/a38x/mvSysEnvLib.c
@@ -329,6 +329,8 @@
gBoardId = CUSTOMER_BOARD_ID0;
#elif CONFIG_CUSTOMER_BOARD_1
gBoardId = CUSTOMER_BOARD_ID1;
+ #elif CONFIG_CLEARFOG_BOARD
+ gBoardId = A38X_CLEARFOG_BOARD_ID;
#endif
#else
/* For Marvell Boards: read board ID from TWSI*/
diff --git a/tools/marvell/bin_hdr/platform/sysEnv/a38x/mvSysEnvLib.h b/tools/marvell/bin_hdr/platform/sysEnv/a38x/mvSysEnvLib.h
index 640b3b3..66f6138 100755
--- a/tools/marvell/bin_hdr/platform/sysEnv/a38x/mvSysEnvLib.h
+++ b/tools/marvell/bin_hdr/platform/sysEnv/a38x/mvSysEnvLib.h
@@ -293,7 +293,8 @@
#define A38X_CUSTOMER_BOARD_ID_BASE 0x0
#define A38X_CUSTOMER_BOARD_ID0 (A38X_CUSTOMER_BOARD_ID_BASE + 0)
#define A38X_CUSTOMER_BOARD_ID1 (A38X_CUSTOMER_BOARD_ID_BASE + 1)
-#define A38X_MV_MAX_CUSTOMER_BOARD_ID (A38X_CUSTOMER_BOARD_ID_BASE + 2)
+#define A38X_CLEARFOG_BOARD_ID (A38X_CUSTOMER_BOARD_ID_BASE + 2)
+#define A38X_MV_MAX_CUSTOMER_BOARD_ID (A38X_CUSTOMER_BOARD_ID_BASE + 3)
#define A38X_MV_CUSTOMER_BOARD_NUM (A38X_MV_MAX_CUSTOMER_BOARD_ID - A38X_CUSTOMER_BOARD_ID_BASE)
/* Marvell boards for A38x*/
@@ -488,11 +489,13 @@
#define MV_BOARD_WAKEUP_GPIO_INFO {\
{A38X_CUSTOMER_BOARD_ID0, -1 },\
{A38X_CUSTOMER_BOARD_ID0, -1 },\
+{A38X_CLEARFOG_BOARD_ID, -1 },\
};
#define MV_BOARD_USB_VBUS_GPIO_INFO {\
{A38X_CUSTOMER_BOARD_ID0, {-1, -1} },\
{A38X_CUSTOMER_BOARD_ID0, {-1, -1} },\
+{A38X_CLEARFOG_BOARD_ID, {-1, -1} },\
};
#else
#define MV_BOARD_WAKEUP_GPIO_INFO {\
diff --git a/tools/marvell/bin_hdr/src_phy/a38x/mvHighSpeedTopologySpec-38x.c b/tools/marvell/bin_hdr/src_phy/a38x/mvHighSpeedTopologySpec-38x.c
index 5437807..ec2c65f 100755
--- a/tools/marvell/bin_hdr/src_phy/a38x/mvHighSpeedTopologySpec-38x.c
+++ b/tools/marvell/bin_hdr/src_phy/a38x/mvHighSpeedTopologySpec-38x.c
@@ -93,6 +93,14 @@
{ SATA3, __3Gbps, SERDES_DEFAULT_MODE, MV_FALSE, MV_FALSE },
{ SATA2, __3Gbps, SERDES_DEFAULT_MODE, MV_FALSE, MV_FALSE },
{ USB3_HOST1, __5Gbps, SERDES_DEFAULT_MODE, MV_FALSE, MV_FALSE }
+},
+{ /* SolidRun ClearFog-A1 REV2.0 Topology */
+ { SATA0, __3Gbps, SERDES_DEFAULT_MODE, MV_FALSE, MV_FALSE },
+ { SGMII1, __1_25Gbps, SERDES_DEFAULT_MODE, MV_FALSE, MV_FALSE },
+ { PEX1, __5Gbps, PEX_ROOT_COMPLEX_x1, MV_FALSE, MV_FALSE },
+ { USB3_HOST1, __5Gbps, SERDES_DEFAULT_MODE, MV_FALSE, MV_FALSE },
+ { PEX2, __5Gbps, PEX_ROOT_COMPLEX_x1, MV_FALSE, MV_FALSE },
+ { SGMII2, __1_25Gbps, SERDES_DEFAULT_MODE, MV_FALSE, MV_FALSE }
}};
@@ -125,6 +133,7 @@
{
loadTopologyCustomer, /* Customer Board 0 */
loadTopologyCustomer, /* Customer Board 1*/
+ loadTopologyCustomer, /* SolidRun ClearFog Board */
};
#else /* CONFIG_CUSTOMER_BOARD_SUPPORT */
