| commit | 46a5534d942dcf8e6845c00c42c76cd60f5477c8 | [log] [tgz] |
|---|---|---|
| author | Yaron David <yarond@marvell.com> | Thu Sep 03 18:25:03 2015 +0300 |
| committer | Greg Poist <poist@google.com> | Thu Mar 24 11:59:54 2016 -0700 |
| tree | ec43cd64da2054350d0e2029238e9f082bca0975 | |
| parent | 22e6c5e3a3cddd456f939b3807da21432bc58521 [diff] |
ddr3libv2: Bump DDR3 TIP-1.42 re-implemented Enhanced WL Supplementary flow Change-Id: I3bbd1ff7e04c7fb7d5488d702f973ff50a3cdd51 Signed-off-by: Yaron David <yarond@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/23422 Reviewed-by: Haim Boot <hayim@marvell.com> Tested-by: Haim Boot <hayim@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/24161 Reviewed-by: Omri Itach <omrii@marvell.com> Tested-by: Omri Itach <omrii@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h index 4c89bf9..dfb600a 100755 --- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h +++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/h/Driver/ddr3/mvDdr3TrainingIp.h
@@ -54,7 +54,7 @@ #ifdef CONFIG_DDR4 #define DDR3_TIP_VERSION_STRING "DDR4 Training Sequence - Ver TIP-0.20." #else -#define DDR3_TIP_VERSION_STRING "DDR3 Training Sequence - Ver TIP-1.41." +#define DDR3_TIP_VERSION_STRING "DDR3 Training Sequence - Ver TIP-1.42." #endif #define MAX_CS_NUM (4)