fix: usb: msys_ac3: usb2 UTMI Phy optimizations after ETP
Electrical tests on the AC3 revealed 2 USB2 problems:
- violation of the high limit of the low speed amplitude
- squelch level was too high in High speed mode
Solution:
-don't use the default values, reduce the drive strength and the
squelch level
Change-Id: I1796b601ccf16513c8204e800e53b6f4d11a34c3
Signed-off-by: Margarita Granov <margra@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/19800
Tested-by: Star_Automation <star@marvell.com>
Reviewed-by: Omri Itach <omrii@marvell.com>
diff --git a/tools/marvell/bin_hdr/src_phy/msys/mvHighSpeedEnvSpec.c b/tools/marvell/bin_hdr/src_phy/msys/mvHighSpeedEnvSpec.c
index 12c60aa..58a8545 100755
--- a/tools/marvell/bin_hdr/src_phy/msys/mvHighSpeedEnvSpec.c
+++ b/tools/marvell/bin_hdr/src_phy/msys/mvHighSpeedEnvSpec.c
@@ -113,6 +113,8 @@
{ USB_REG_UNIT, 0x50804, 0x3, { 0x2 }, 0, 0 }, /* Phy offset 0x1 - PLL_CONTROL1 */
{ USB_REG_UNIT, 0x5080C, 0x3000000, { 0x2000000 }, 0, 0 }, /* Phy offset 0x3 - TX Channel control 0 */
{ USB_REG_UNIT, 0x50800, 0x1FF007F, { 0x600005 }, 0, 0 }, /* Phy offset 0x0 - PLL_CONTROL0 */
+ { USB_REG_UNIT, 0x5080C, 0x000F000, { 0x0001000 }, 0, 0 }, /* DRV_EN_LS 0x1 - TX Channel control 0 */
+ { USB_REG_UNIT, 0x50814, 0x000000F, { 0x000000D }, 0, 0 }, /* SQ_THRESH 0xD - TX Channel control 0 */
{ USB_REG_UNIT, 0x5080C, 0x3000000, { 0x3000000 }, 0, 0 }, /* Phy offset 0x3 - TX Channel control 0 */
{ USB_REG_UNIT, 0x50804, 0x3, { 0x3 }, 0, 0 }, /* Phy offset 0x1 - PLL_CONTROL1 */
{ USB_REG_UNIT, 0x50808, 0x80800000, { 0x80800000 }, 1, 1000 }, /* check PLLCAL_DONE is set and IMPCAL_DONE is set*/
