blob: ab40daa4c5c0fd85993a52ad18a583d3338dd649 [file] [log] [blame]
/*******************************************************************************
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
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*******************************************************************************/
/*
Linux/vxWorks partitions on nor flash
*/
struct partitionInformation {
char *defaultImage;
MV_U32 FLASH_SIZE;
MV_U32 KERNEL_SIZE;
MV_U32 ROOTFS_SIZE;
MV_U32 KERNEL_START;
MV_U32 BLOCK_ALIMENT;
MV_U32 ROOTFS_START;
};
#define CFG_DEF_SOURCE_LOAD_ADDR 0x2000000
#define CFG_DEF_KERNEL_DEST_ADDR 0x10000000
#define CFG_DEF_ROOTFS_DEST_ADDR (CFG_DEF_KERNEL_DEST_ADDR + 0x1000000)
#define CFG_APPL_SPI_FLASH_START_DIRECT SPI_CS_BASE
#define CFG_APPL_SPI_FLASH_SIZE SPI_CS_SIZE
#define CFG_APPL_SPI_FLASH_BLOCK_ALIMENT 0x100000
#define CFG_APPL_SPI_FLASH_PARTITIONS_NAME "Linux/vxWorks"
#define CFG_APPL_FLASH_PART_UBOOT_START (0)
#define CFG_APPL_FLASH_PART_UBOOT_SIZE _2M
#define CFG_APPL_SPI_FLASH_PART_KERNEL_START (CFG_APPL_FLASH_PART_UBOOT_START + CFG_APPL_FLASH_PART_UBOOT_SIZE)
#define CFG_APPL_SPI_FLASH_PART_KERNEL_SIZE _4M
#define CFG_APPL_SPI_FLASH_PART_ROOTFS_START (CFG_APPL_SPI_FLASH_PART_KERNEL_START + CFG_APPL_SPI_FLASH_PART_KERNEL_SIZE)
#define ALL_SPI_PARTS (CFG_APPL_SPI_FLASH_PART_KERNEL_SIZE + CFG_APPL_FLASH_PART_UBOOT_SIZE + _16M)
#define REST_SPI_FLASH (CFG_APPL_SPI_FLASH_SIZE - (CFG_APPL_SPI_FLASH_PART_KERNEL_SIZE + \
CFG_APPL_FLASH_PART_UBOOT_SIZE))
#define CFG_APPL_SPI_FLASH_PART_ROOTFS_SIZE ((SPI_CS_SIZE > ALL_SPI_PARTS) ? _16M : \
(CFG_APPL_SPI_FLASH_SIZE - \
(CFG_APPL_SPI_FLASH_PART_KERNEL_SIZE + \
CFG_APPL_FLASH_PART_UBOOT_SIZE)))
#define CFG_APPL_NAND_FLASH_SIZE _1G
#define CFG_APPL_NAND_FLASH_BLOCK_ALIMENT 0x40000
#define CFG_APPL_NAND_FLASH_PART_KERNEL_START (0)
#define CFG_APPL_NAND_FLASH_PART_KERNEL_SIZE (_8M + _2M) /* _10M */
#define CFG_APPL_NAND_FLASH_PART_ROOTFS_START (CFG_APPL_NAND_FLASH_PART_KERNEL_START + \
CFG_APPL_NAND_FLASH_PART_KERNEL_SIZE)
#define ALL_NAND_PARTS (CFG_APPL_NAND_FLASH_PART_KERNEL_SIZE + CFG_APPL_NAND_FLASH_PART_ROOTFS_SIZE)
#define REST_NAND_FLASH (CFG_APPL_NAND_FLASH_SIZE - CFG_APPL_SPI_FLASH_PART_KERNEL_SIZE)
#define CFG_APPL_NAND_FLASH_PART_ROOTFS_SIZE _32M
/*
sram definitions for freertos
*/
#define CONFIG_FREERTOS_SRAM_ADDR 0x50000000
#define MARVELL_VENDOR_ID 0x11ab
#define NP5_DEVICE_ID 0x2012
#define BC2_DEVICE_ID 0xfc00
#define INT_LVL_XCAT2_SWITCH 55 /* Switch MG interrupt */
/*
* dev_id[15:10] bits of DeviceID register of Prestera (0x4C)
* determine the chip type (xCat or xCat2).
* dev_id[15:10] == 0x37 stands for xCat
* dev_id[15:10] == 0x39 stands for xCat2
*/
#define MV_PP_CHIP_TYPE_MASK 0x000FC00
#define MV_PP_CHIP_TYPE_OFFSET 10
#define MV_PP_CHIP_TYPE_XCAT2 0x39
#ifndef __ASSEMBLY__
typedef enum { // special device enum
SILT_XCAT2,
SILT_NP5,
SILT_BC2,
SILT_OTHER,
SLIC_NOT_DETECT = 0x5a5a
} SILICON_TYPE;
SILICON_TYPE get_attached_silicon_type(void);
int do_sar_bc2(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]);
#endif