commit 0277985b8271863728d10fbe22307b8a827d1a37
author hayim <hayim@marvell.com> Sun Aug 09 00:36:56 2015 +0300
committer Greg Poist <poist@google.com> Thu Mar 24 11:59:54 2016 -0700
tree ec145119536c8664a443e53c94ceb24306b2d3e6
parent 2447880b4460b1164da8df19db9da1d36d59854f

fix: ddr3libv2: bobk: fixed compilation warning in silicon level

    - removed dq mapping compilation warning.
    - removed un-used variables from DFS flow.

Change-Id: Idca26c7345defdbea8369b8d3d1be5877b412287
Signed-off-by: hayim <hayim@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/22621
Reviewed-by: Omri Itach <omrii@marvell.com>
Tested-by: Omri Itach <omrii@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/24149
Tested-by: Star_Automation <star@marvell.com>

tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c

diff --git a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
index dfbebb9..8bf0a50 100755
--- a/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
+++ b/tools/marvell/bin_hdr/src_ddr/ddr3libv2/src/Silicon/mvHwsDdr3BobK.c
@@ -240,7 +240,7 @@
 /* Bit mapping (for PBS) */
 GT_U32 bobKDQbitMap2Phypin[] =
 {
-#warning "DQ mapping is updated for Interface4 only!" !!!
+/*#warning "DQ mapping is updated for Interface4 only!" !!!*/
 	    /* Interface 0 */
 	    0,0,0,0,0,0,0,0 , /* dq[0:7]   */
 	    0,0,0,0,0,0,0,0 , /* dq[8:15]  */
@@ -1311,7 +1311,10 @@
     MV_HWS_DDR_FREQ                 frequency
 )
 {
-    GT_U32 data = 0, value, divider = 0, divRatio;
+    GT_U32 data = 0, divider = 0;
+#if 0
+    GT_U32 value, divRatio;
+#endif
     MV_HWS_DDR_FREQ sarFreq;
     GT_U32 writeData;