| Qualcomm PM8xxx PMIC multi-function devices |
| |
| The PM8xxx family of Power Management ICs are used to provide regulated |
| voltages and other various functionality to Qualcomm SoCs. |
| |
| = PROPERTIES |
| |
| - compatible: |
| Usage: required |
| Value type: <string> |
| Definition: must be one of: |
| "qcom,pm8058" |
| "qcom,pm8921" |
| |
| - #address-cells: |
| Usage: required |
| Value type: <u32> |
| Definition: must be 1 |
| |
| - #size-cells: |
| Usage: required |
| Value type: <u32> |
| Definition: must be 0 |
| |
| - interrupts: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: specifies the interrupt that indicates a subdevice |
| has generated an interrupt (summary interrupt). The |
| format of the specifier is defined by the binding document |
| describing the node's interrupt parent. |
| |
| - #interrupt-cells: |
| Usage: required |
| Value type : <u32> |
| Definition: must be 2. Specifies the number of cells needed to encode |
| an interrupt source. The 1st cell contains the interrupt |
| number. The 2nd cell is the trigger type and level flags |
| encoded as follows: |
| |
| 1 = low-to-high edge triggered |
| 2 = high-to-low edge triggered |
| 4 = active high level-sensitive |
| 8 = active low level-sensitive |
| |
| - interrupt-controller: |
| Usage: required |
| Value type: <empty> |
| Definition: identifies this node as an interrupt controller |
| |
| = SUBCOMPONENTS |
| |
| The PMIC contains multiple independent functions, each described in a subnode. |
| The below bindings specify the set of valid subnodes. |
| |
| == Real-Time Clock |
| |
| - compatible: |
| Usage: required |
| Value type: <string> |
| Definition: must be one of: |
| "qcom,pm8058-rtc" |
| "qcom,pm8921-rtc" |
| "qcom,pm8941-rtc" |
| |
| - reg: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: single entry specifying the base address of the RTC registers |
| |
| - interrupts: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: single entry specifying the RTC's alarm interrupt |
| |
| - allow-set-time: |
| Usage: optional |
| Value type: <empty> |
| Definition: indicates that the setting of RTC time is allowed by |
| the host CPU |
| |
| = EXAMPLE |
| |
| pmicintc: pmic@0 { |
| compatible = "qcom,pm8921"; |
| interrupts = <104 8>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| rtc@11d { |
| compatible = "qcom,pm8921-rtc"; |
| reg = <0x11d>; |
| interrupts = <0x27 0>; |
| }; |
| }; |