arch/arm/plat-feroceon/mv_hal/idma/mvIdma.h

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/*******************************************************************************
* mvIdma.h - Header File for :
*
* DESCRIPTION:
*       This file contains Marvell Controller IDMA HW library API.
*       NOTE: This HW library API assumes IDMA source, destination and
*       descriptors are cache coherent.
*
* DEPENDENCIES:
*       None.
*
*******************************************************************************/


#ifndef __INCmvIdmah
#define __INCmvIdmah

#include "mvCommon.h"
#include "mvOs.h"
#include "idma/mvIdmaRegs.h"
#include "ctrlEnv/mvCtrlEnvSpec.h"

/* defines  */
#define MV_IDMA_DESC_ALIGNMENT  0x10  /* 16bytes aligment restriction       */

/* typedefs */


/* This struct describes IDMA descriptor structure                          */
typedef struct _mvDmaDesc {
	MV_U32 	byteCnt;	/* The total number of bytes to transfer        */
	MV_U32 	phySrcAdd;	/* The physical source address                  */
	MV_U32 	phyDestAdd;	/* The physical destination address             */
	MV_U32	phyNextDescPtr;	/* If we are using chain mode DMA transfer,     */
				/* then this pointer should point to the        */
				/* physical address of the next descriptor,     */
				/* otherwise it should be NULL.                 */
} MV_DMA_DESC;


/* mvIdma.h API list */
MV_VOID mvDmaHalInit(MV_U32);
MV_STATUS mvDmaCtrlLowSet(MV_U32 chan, MV_U32 ctrlWord);
MV_STATUS mvDmaCtrlHighSet(MV_U32 chan, MV_U32 ctrlWord);
MV_STATUS mvDmaTransfer(MV_U32 chan, MV_U32 phySrc, MV_U32 phyDst, MV_U32 size, MV_U32 phyNextDescPtr);
MV_STATUS mvDmaMemInit(MV_U32 chan, MV_U32 ptrnPtr, MV_U32 startPtr, MV_U32 size);
MV_STATE  mvDmaStateGet(MV_U32 chan);
MV_STATUS mvDmaCommandSet(MV_U32 chan, MV_COMMAND command);

MV_VOID mvIdmaRegs(MV_U32 chan);

#endif /* __INCmvIdmah */