prism: more evt2 gpio config.

- pon_pwr_en is active high.
- pon_led_{blue, red} is connected to GPIO {9, 10}.
- dolos_detect is connected to GPIO 27.

Change-Id: I8c9512da5363ebb4680654ba62a7783029a0f4a9
diff --git a/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.c b/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
index fde344a..dbcdded 100755
--- a/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
+++ b/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
@@ -1306,7 +1306,7 @@
 	}
 };
 
-MV_BOARD_GPP_INFO gflt200InfoBoardGppInfo[] = {
+MV_BOARD_GPP_INFO gflt200Evt1InfoBoardGppInfo[] = {
 	/* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */
 	/*{BOARD_GPP_PON_XVR_TX, 17, 0},*/
 	/*{BOARD_GPP_PON_XVR_TX_IND, 24, 0},*/
@@ -1314,6 +1314,11 @@
 	{BOARD_GPP_PON_XVR_TX_POWER, 37, 1},
 };
 
+MV_BOARD_GPP_INFO gflt200Evt2InfoBoardGppInfo[] = {
+	{BOARD_GPP_PON_XVR_TX, 21, 1},
+	{BOARD_GPP_PON_XVR_TX_POWER, 37, 0},
+};
+
 MV_DEV_CS_INFO gflt200InfoBoardDeCsInfo[] = {
 	/*{deviceCS, params, devType, devWidth} */
 #ifdef MV_SPI
@@ -1376,6 +1381,9 @@
 			= MV_ARRAY_SIZE(gflt200Evt1InfoBoardMppConfigValue);
 		pBoardInfo->pBoardMppConfigValue
 			= gflt200Evt1InfoBoardMppConfigValue;
+		pBoardInfo->numBoardGppInfo
+			= MV_ARRAY_SIZE(gflt200Evt1InfoBoardGppInfo),
+		pBoardInfo->pBoardGppInfo = gflt200Evt1InfoBoardGppInfo,
 		pBoardInfo->gppOutEnValLow = GFLT200_EVT1_GPP_OUT_ENA_LOW;
 		pBoardInfo->gppOutEnValMid = GFLT200_EVT1_GPP_OUT_ENA_MID;
 		pBoardInfo->gppOutValLow = GFLT200_EVT1_GPP_OUT_VAL_LOW;
@@ -1392,6 +1400,9 @@
 			= MV_ARRAY_SIZE(gflt200Evt2InfoBoardMppConfigValue);
 		pBoardInfo->pBoardMppConfigValue
 			= gflt200Evt2InfoBoardMppConfigValue;
+		pBoardInfo->numBoardGppInfo
+			= MV_ARRAY_SIZE(gflt200Evt2InfoBoardGppInfo),
+		pBoardInfo->pBoardGppInfo = gflt200Evt2InfoBoardGppInfo,
 		pBoardInfo->gppOutEnValLow = GFLT200_EVT2_GPP_OUT_ENA_LOW;
 		pBoardInfo->gppOutEnValMid = GFLT200_EVT2_GPP_OUT_ENA_MID;
 		pBoardInfo->gppOutValLow = GFLT200_EVT2_GPP_OUT_VAL_LOW;
@@ -1416,8 +1427,6 @@
 	.pBoardTwsiDev = gflt200InfoBoardTwsiDev,
 	.numBoardMacInfo = MV_ARRAY_SIZE(gflt200InfoBoardMacInfo),
 	.pBoardMacInfo = gflt200InfoBoardMacInfo,
-	.numBoardGppInfo = MV_ARRAY_SIZE(gflt200InfoBoardGppInfo),
-	.pBoardGppInfo = gflt200InfoBoardGppInfo,
 	.activeLedsNumber = 0,
 	.pLedGppPin = NULL,
 	.ledsPolarity = 0,
diff --git a/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.h b/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
index 97b96bc..d38f6e5 100755
--- a/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
+++ b/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
@@ -496,22 +496,21 @@
  6 I2C_SCLK (out)         ...
  7 UART0_TX (out)         ...
  8 UART0_RX (in)          ...
- 9 VDD_MARGIN_EN (out)    ---
-10 VDD_MARGIN_CTRL (out)  ---
-11 PON_LINK_LED (out)     PON_LED_RED (out)
-12 PON_ERROR_LED (out)    PON_LED_BLUE (out)
+ 9 VDD_MARGIN_EN (out)    PON_LED_BLUE (out)
+10 VDD_MARGIN_CTRL (out)  PON_LED_RED (out)
+11 PON_LINK_LED (out)     ---
+12 PON_ERROR_LED (out)    ---
 13 BOARD_VER[0] (in)      ...
 14 ---                    GE_LINK_LED (out)
 15 BOARD_VER[1] (in)      ...
 17 SW_RESET (out)         ...
 18 BOARD_VER[2] (in)      ...
 21 PON_TX_DIS (out)       ...
-22 ---                    DOLOS_DETECT (in)
 23 GE_DATA_LED (out)      ---
 24 GE_LINK_LED (out)      PTP_TRIG_GEN (out)
 25 ---                    PTP_EVENT_REQ (in)
 26 PON_C2_DATA (out)      GE_DATA_LED (out)
-27 PON_C2_CLK (out)       PTP_CLK (in)
+27 PON_C2_CLK (out)       DOLOS_DETECT (in)
 28 SPI_WP_L (out)         ...
 29 PON_RX_LOS (in)        ...
 31 UART1_RX (out)         ...
@@ -529,11 +528,11 @@
 #define GFLT200_EVT1_GPP_POL_LOW	0x0
 #define GFLT200_EVT1_GPP_POL_MID	0x0
 
-#define GFLT200_EVT2_GPP_OUT_ENA_LOW	(BIT13 | BIT15 | BIT18 | BIT22 | BIT29)
+#define GFLT200_EVT2_GPP_OUT_ENA_LOW	(BIT13 | BIT15 | BIT18 | BIT27 | BIT29)
 #define GFLT200_EVT2_GPP_OUT_ENA_MID	(BIT4)
 
 #define GFLT200_EVT2_GPP_OUT_VAL_LOW	(BIT21 | BIT28)
-#define GFLT200_EVT2_GPP_OUT_VAL_MID	0x0
+#define GFLT200_EVT2_GPP_OUT_VAL_MID	(BIT5)
 
 #define GFLT200_EVT2_GPP_POL_LOW	0x0
 #define GFLT200_EVT2_GPP_POL_MID	0x0