Patch RC13.1 from Marvell.
- Fix Adtran interop issue.
- Randomize equalization delay to try to fix ALU issue.
Change-Id: I6e608e4b720c6179cd793169c5ca4a6332c21095
diff --git a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuAlloc.c b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuAlloc.c
old mode 100755
new mode 100644
index 07b9ca5..d95b910
--- a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuAlloc.c
+++ b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuAlloc.c
@@ -721,7 +721,6 @@
"DEBUG: (%s:%d) release All T-Conts buffers, tpm_deactive_tcont\n", __FILE_DESC__, __LINE__);
#endif /* MV_GPON_DEBUG_PRINT */
- //printk("TCONT flush, FreeAllBuffers\n");
status = onuGponWqTcontFlush(tcontNum);
if (status != MV_OK)
{
diff --git a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuApi.c b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuApi.c
old mode 100755
new mode 100644
index 2a99b3b..61f2c6d
--- a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuApi.c
+++ b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuApi.c
@@ -177,13 +177,6 @@
return rcode;
}
- /*rcode = onuGponSrvcRangingRandomInit();
- if (rcode != MV_OK)
- {
- mvPonPrint(PON_PRINT_ERROR, PON_API_MODULE,
- "ERROR: (%s:%d) onuGponRangingRandomInit", __FILE_DESC__, __LINE__);
- return rcode;
- }*/
if (disabled == MV_TRUE)
{
@@ -588,10 +581,6 @@
"ERROR: (%s:%d) onuGponApiGemConfig", __FILE_DESC__, __LINE__);
break;
}
- if (onuGponDbGemPortAesGet(portId) == MV_TRUE) {
- /*update HW as well*/
- mvOnuGponMacAesPortIdSet(portId,MV_TRUE);
- }
}
else{
rcode = onuGponApiGemPortIdClear(portId);
@@ -601,10 +590,6 @@
"ERROR: (%s:%d) onuGponApiGemConfig", __FILE_DESC__, __LINE__);
break;
}
- if (onuGponDbGemPortAesGet(portId) == MV_TRUE) {
- /*remove HW configuration but keep SW encryption indication*/
- mvOnuGponMacAesPortIdSet(portId,MV_FALSE);
- }
}
}
@@ -765,6 +750,11 @@
}
onuGponDbGemPortValidSet(gemPortid, MV_TRUE);
+ if (onuGponDbGemPortAesGet(gemPortid) == MV_TRUE) {
+ /*update HW as well*/
+ mvOnuGponMacAesPortIdSet(gemPortid, MV_TRUE);
+ }
+
#ifdef MV_GPON_STATIC_GEM_PORT
if (staticGemPortConfigFlag == 0)
{
@@ -809,6 +799,11 @@
}
onuGponDbGemPortValidSet(gemPortid, MV_FALSE);
+ if (onuGponDbGemPortAesGet(gemPortid) == MV_TRUE) {
+ /*remove HW configuration but keep SW encryption indication*/
+ mvOnuGponMacAesPortIdSet(gemPortid, MV_FALSE);
+ }
+
return(rcode);
}
diff --git a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuInit.c b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuInit.c
old mode 100755
new mode 100644
index b8cf3b7..d14c59d
--- a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuInit.c
+++ b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuInit.c
@@ -328,6 +328,10 @@
for S/N Request answer delay */
onuGponDbSerialNumGet(sn);
snForRandomSeed = (MV_U32)(randomRange[1] & 0xFF) + (MV_U32)((randomRange[0] & 0xFF) << 8);
+ printk("snForRandomSeed = %d\n",snForRandomSeed);
+ /* delay start up for the random time */
+ mvOsDelay((snForRandomSeed & 0xFF));
+
rcode = mvOnuGponMacSerialNumberSet(snForRandomSeed);
if (rcode != MV_OK)
{
diff --git a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuMngr.h b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuMngr.h
old mode 100755
new mode 100644
diff --git a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuMngrStateMachine.c b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuMngrStateMachine.c
old mode 100755
new mode 100644
index 3661623..eb2f47c
--- a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuMngrStateMachine.c
+++ b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuMngrStateMachine.c
@@ -307,7 +307,7 @@
{
mvPonPrint(PON_PRINT_ERROR, PON_SM_MODULE,
"ERROR: (%s:%d) onuGponPonMngClearOnuBuffers\n", __FILE_DESC__, __LINE__);
- return;
+ return(rcode);
}
rcode = onuGponPonMngClearOnuId();
@@ -615,6 +615,7 @@
get_random_bytes((void*)randomRange, sizeof(randomRange));
randomVal = (((randomRange[0] >> randomLeft) & 0xDF) ^ ((randomRange[1] >> randomRight) & 0xDF));
+
}
/*******************************************************************************
@@ -782,7 +783,11 @@
finalDelay = M_ONU_GPON_RANG_MSG_FINAL_DELAY(preAssignDelayTemp);
equalizationDelay = M_ONU_GPON_RANG_MSG_EQUAL_DELAY(preAssignDelayTemp);
+ /*onuGponPonMngRandomDelayGen4SN_Equ();*/
+
equalizationDelay += randomVal * 32;
+ printk("onuGponPonMngOverheadMsg: equalizationDelay = 0x%x\n", equalizationDelay);
+
rcode = mvOnuGponMacRxEqualizationDelaySet(equalizationDelay);
if (rcode != MV_OK)
@@ -804,7 +809,7 @@
__FILE_DESC__, __LINE__, finalDelay);
return;
}
-
+#if 0
rcode = onuGponPonMngrUpdateState((MV_U32)ONU_GPON_03_SERIAL_NUM);
if (rcode != MV_OK)
{
@@ -812,7 +817,7 @@
"ERROR: (%s:%d) onuGponPonMngrUpdateState(3)\n", __FILE_DESC__, __LINE__);
return;
}
-
+#endif
/* update database */
onuGponDbEqualizationDelaySet(preAssignDelay);
@@ -837,13 +842,15 @@
/* Before changing state check SN_Mask VALUE and serialNumberMaskDefaultStateFlag mode.
** Add Support for HW and SW state machine */
- //rcode = onuGponPonMngrUpdateState((MV_U32)ONU_GPON_03_SERIAL_NUM);
- //if (rcode != MV_OK)
- //{
- // mvPonPrint(PON_PRINT_ERROR, PON_SM_MODULE,
- // "ERROR: (%s:%d) onuGponPonMngrUpdateState(3)\n", __FILE_DESC__, __LINE__);
- // return;
- //}
+#if 1
+ rcode = onuGponPonMngrUpdateState((MV_U32)ONU_GPON_03_SERIAL_NUM);
+ if (rcode != MV_OK)
+ {
+ mvPonPrint(PON_PRINT_ERROR, PON_SM_MODULE,
+ "ERROR: (%s:%d) onuGponPonMngrUpdateState(3)\n", __FILE_DESC__, __LINE__);
+ return;
+ }
+#endif
#ifdef MV_GPON_PERFORMANCE_CHECK
asicOntGlbRegReadNoCheck(mvAsicReg_GPON_GEN_MICRO_SEC_CNT,
diff --git a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuPm.c b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuPm.c
old mode 100755
new mode 100644
index 4c78db0..24b8f87
--- a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuPm.c
+++ b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuPm.c
@@ -208,7 +208,7 @@
S_RxBip8Pm inBip8Pm;
unsigned long flags;
- onuGponPonMngRandomDelayGen4SN_Equ();
+ onuGponPonMngRandomDelayGen4SN_Equ();
onuGponPmCountersAdd();
onuGponPmRxBip8PmGet(&inBip8Pm);
spin_lock_irqsave(&onuPonIrqLock, flags);
diff --git a/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuSrvc.c b/arch/arm/plat-feroceon/mv_drivers_lsp/mv_pon/core/gpon/gponOnuSrvc.c
old mode 100755
new mode 100644
