arch/arm/mach-feroceon-kw2/mv_hal_if/mvSysNeta.c

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#include "mvCommon.h"
#include "mvOs.h"
#include "ctrlEnv/mvCtrlEnvLib.h"
#include "boardEnv/mvBoardEnvLib.h"
#include "cpu/mvCpu.h"
#include "neta/gbe/mvNeta.h"


/*******************************************************************************
* mvSysNetaInit - Initialize the Eth subsystem
*
* DESCRIPTION:
*
* INPUT:
*       None
* OUTPUT:
*		None
* RETURN:
*       None
*
*******************************************************************************/
void 	mvSysNetaInit(MV_U32 portMask, MV_U32 cpuMask)
{
	MV_NETA_HAL_DATA halData;
	MV_U32 port;
	MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
	MV_STATUS status;
	int i;

	memset(&halData, 0, sizeof(halData));
	status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
	if (status != MV_OK)
		return;

	for (i = 0; i < MAX_TARGETS; i++) {
		if (addrWinMap[i].enable == MV_FALSE)
			continue;

#ifdef CONFIG_MV_SUPPORT_L2_DEPOSIT
		/* Setting DRAM windows attribute to :
		   0x3 - Shared transaction + L2 write allocate (L2 Deposit) */
		if (MV_TARGET_IS_DRAM(i)) {
			addrWinMap[i].attrib &= ~(0x30);
			addrWinMap[i].attrib |= 0x30;
		}
#endif
		mvOsPrintf("%d - Base 0x%08x , Size = 0x%08x.\n", i,
                                addrWinMap[i].addrWin.baseLow,
                                addrWinMap[i].addrWin.size);
	}
	halData.portMask = portMask;
	halData.cpuMask  = cpuMask;

	halData.maxPort = mvCtrlEthMaxPortGet();
	halData.pClk = mvCpuPclkGet();
	halData.tClk = mvBoardTclkGet();
	halData.maxCPUs = mvCtrlEthMaxCPUsGet();
	halData.iocc = arch_is_coherent();
	halData.ctrlModel = mvCtrlModelGet();
	halData.ctrlRev = mvCtrlRevGet();
#ifdef CONFIG_MV_ETH_BM
	halData.bmPhysBase = PNC_BM_PHYS_BASE;
	halData.bmVirtBase = (MV_U8 *)ioremap(PNC_BM_PHYS_BASE, PNC_BM_SIZE);
#endif /* CONFIG_MV_ETH_BM */

#ifdef CONFIG_MV_ETH_PNC
	halData.pncPhysBase = PNC_BM_PHYS_BASE;
	halData.pncVirtBase = (MV_U8 *)ioremap(PNC_BM_PHYS_BASE, PNC_BM_SIZE);
#endif /* CONFIG_MV_ETH_PNC */

	for (port = 0; port < halData.maxPort; port++) {
		if (!(MV_BIT_CHECK(portMask, port)))
			continue;
		if (mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port) == MV_FALSE)
			continue;

		mvNetaPortPowerUp(port, mvBoardIsPortInSgmii(port), mvBoardIsPortInRgmii(port));
		status = mvNetaWinInit(port, addrWinMap);
		if (status != MV_OK)
			continue;
	}
	mvNetaHalInit(&halData);

	return;
}