Merge remote-tracking branch 'gfiber-internal/prism_dev' into squeeze
Change-Id: I6403514e2bb6aa7eada7056ff0d4867e338f1495
diff --git a/arch/arm/configs/gflt200_defconfig b/arch/arm/configs/gflt200_defconfig
index 358ae44..9306a95 100644
--- a/arch/arm/configs/gflt200_defconfig
+++ b/arch/arm/configs/gflt200_defconfig
@@ -1157,7 +1157,14 @@
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
-# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+CONFIG_ORION_WATCHDOG=y
+
CONFIG_SSB_POSSIBLE=y
#
@@ -1233,7 +1240,22 @@
# CONFIG_MMC_CB710 is not set
# CONFIG_MMC_VIA_SDMMC is not set
# CONFIG_MEMSTICK is not set
-# CONFIG_NEW_LEDS is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_DONT_CLOBBER_BRIGHTNESS=y
+
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
@@ -1261,6 +1283,7 @@
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
+CONFIG_RTC_DRV_PCF8523=y
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
diff --git a/arch/arm/mach-feroceon-kw2/Makefile b/arch/arm/mach-feroceon-kw2/Makefile
index d35904f..6e308d3 100755
--- a/arch/arm/mach-feroceon-kw2/Makefile
+++ b/arch/arm/mach-feroceon-kw2/Makefile
@@ -81,7 +81,7 @@
OSSERVICES_OBJS = $(OSSERV_DIR)/mvOs.o
-HAL_OBJS = $(HAL_RTC_DIR)/mvRtc.o $(HAL_DRAM_SPD_DIR)/mvSpd.o \
+HAL_OBJS = $(HAL_DRAM_SPD_DIR)/mvSpd.o \
$(HAL_CNTMR_DIR)/mvCntmr.o \
$(HAL_TWSI_DIR)/mvTwsi.o \
$(HAL_UART_DIR)/mvUart.o $(HAL_GPP_DIR)/mvGpp.o \
@@ -116,7 +116,7 @@
$(HAL_NOR_DIR)/mvFlashCom.o $(HAL_NOR_DIR)/mvIntelFlash.o
LSP_OBJS = $(LSP_DIR)/core.o $(LSP_DIR)/irq.o $(LSP_DIR)/time.o \
- $(LSP_DIR)/leds.o $(LSP_DIR)/sysmap.o $(LSP_DIR)/rtc.o \
+ $(LSP_DIR)/leds.o $(LSP_DIR)/sysmap.o \
$(LSP_DIR)/export.o $(LSP_DIR)/clock.o
obj-y := feroceon.o
@@ -130,6 +130,7 @@
$(HAL_IF_DIR)/mvSysPex.o $(HAL_PEX_DIR)/mvPexAddrDec.o
feroceon-$(CONFIG_MV_INCLUDE_USB) += $(HAL_USB_DIR)/mvUsb.o $(HAL_USB_DIR)/mvUsbAddrDec.o \
$(HAL_IF_DIR)/mvSysUsb.o
+feroceon-$(CONFIG_MV_INCLUDE_RTC) += $(HAL_RTC_DIR)/mvRtc.o $(LSP_DIR)/rtc.o
feroceon-y += $(HAL_ETHPHY_DIR)/mvEthPhy.o $(HAL_IF_DIR)/mvSysEthPhy.o
ifneq ($(CONFIG_MV_ETH_NFP),m)
diff --git a/arch/arm/mach-feroceon-kw2/board-gflt200.c b/arch/arm/mach-feroceon-kw2/board-gflt200.c
index e7da5ee..02d5131 100644
--- a/arch/arm/mach-feroceon-kw2/board-gflt200.c
+++ b/arch/arm/mach-feroceon-kw2/board-gflt200.c
@@ -1,34 +1,148 @@
+#include <boardEnv/mvBoardEnvLib.h>
+#include <gpp/mvGpp.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/leds.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/sysfs.h>
#define BOARD_NAME "gflt200"
+#define BOARD_HW_VER_EVT1 0
+#define BOARD_HW_VER_EVT2 1
#define GPIO_BOARD_VER_0 13
#define GPIO_BOARD_VER_1 15
#define GPIO_BOARD_VER_2 18
+static int board_hw_ver(void)
+{
+ return gpio_get_value(GPIO_BOARD_VER_0)
+ | (gpio_get_value(GPIO_BOARD_VER_1) << 1)
+ | (gpio_get_value(GPIO_BOARD_VER_2) << 2);
+}
+
static ssize_t board_hw_ver_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
- int hw_ver = gpio_get_value(GPIO_BOARD_VER_0)
- | (gpio_get_value(GPIO_BOARD_VER_1) << 1)
- | (gpio_get_value(GPIO_BOARD_VER_2) << 2);
-
- return sprintf(buf, "%d\n", hw_ver);
+ return sprintf(buf, "%d\n", board_hw_ver());
}
static DEVICE_ATTR(hw_ver, S_IRUGO, board_hw_ver_show, NULL);
+static struct gpio_led board_evt1_gpio_leds[] = {
+ {
+ .name = "sys-blue",
+ .gpio = 11,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ {
+ .name = "sys-red",
+ .gpio = 12,
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ },
+};
+
+static struct gpio_led board_evt2_gpio_leds[] = {
+ {
+ .name = "sys-blue",
+ .gpio = 9,
+ .active_low = 1,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+ {
+ .name = "sys-red",
+ .gpio = 10,
+ .active_low = 1,
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ },
+};
+
+static int board_gpio_blink_set(unsigned gpio, unsigned long *delay_on,
+ unsigned long *delay_off);
+
+static struct gpio_led_platform_data board_gpio_leds_data = {
+ .gpio_blink_set = board_gpio_blink_set,
+};
+
+int board_gpio_blink_set(unsigned gpio, unsigned long *delay_on,
+ unsigned long *delay_off)
+{
+ int i;
+ int active_low;
+ MV_U32 mask = 1 << (gpio %32);
+ MV_U32 group = gpio / 32;
+ MV_U32 cycles_per_ms = mvBoardTclkGet() / 1000;
+ unsigned long max_delay = ~0 / cycles_per_ms;
+
+ for (i = 0; i < board_gpio_leds_data.num_leds; i++) {
+ if (gpio == board_gpio_leds_data.leds[i].gpio) {
+ active_low = board_gpio_leds_data.leds[i].active_low;
+ break;
+ }
+ }
+
+ if (i == board_gpio_leds_data.num_leds)
+ return -EINVAL;
+
+ *delay_on = min(*delay_on, max_delay);
+ *delay_off = min(*delay_off, max_delay);
+
+ if (*delay_on && *delay_off) {
+ if (active_low)
+ mvGppBlinkCntrSet(MV_GPP_BLINK_CNTR_A,
+ *delay_off * cycles_per_ms,
+ *delay_on * cycles_per_ms);
+ else
+ mvGppBlinkCntrSet(MV_GPP_BLINK_CNTR_A,
+ *delay_on * cycles_per_ms,
+ *delay_off * cycles_per_ms);
+
+ mvGppBlinkEn(group, mask, mask);
+ }
+ else
+ mvGppBlinkEn(group, mask, 0);
+
+ return 0;
+}
+
+static struct platform_device board_gpio_leds_device = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev.platform_data = &board_gpio_leds_data,
+};
+
+static struct i2c_board_info board_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO("pcf8523", 0x68),
+ },
+};
+
int __init board_init(void)
{
int rc;
+ int hw_ver;
struct platform_device *pdev;
+ switch ((hw_ver = board_hw_ver())) {
+ case BOARD_HW_VER_EVT1:
+ board_gpio_leds_data.num_leds
+ = ARRAY_SIZE(board_evt1_gpio_leds);
+ board_gpio_leds_data.leds = board_evt1_gpio_leds;
+ break;
+ default:
+ pr_err(BOARD_NAME ": unknown hardware version '%d'\n", hw_ver);
+ /* fallthrough */
+ case BOARD_HW_VER_EVT2:
+ board_gpio_leds_data.num_leds
+ = ARRAY_SIZE(board_evt2_gpio_leds);
+ board_gpio_leds_data.leds = board_evt2_gpio_leds;
+ break;
+ }
+
/* /sys/devices/platform/<board_name> */
pdev = platform_device_register_simple(BOARD_NAME, -1, NULL, 0);
if (IS_ERR(pdev)) {
@@ -49,6 +163,17 @@
pr_err(BOARD_NAME ": error %d creating attribute 'hw_ver'\n",
rc);
+ rc = platform_device_register(&board_gpio_leds_device);
+ if (rc)
+ pr_err(BOARD_NAME ": error %d registering GPIO LEDs device\n",
+ rc);
+
+ rc = i2c_register_board_info(0, board_i2c_devices,
+ ARRAY_SIZE(board_i2c_devices));
+ if (rc)
+ pr_err(BOARD_NAME ": error %d registering I2C devices\n",
+ rc);
+
return 0;
}
diff --git a/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.c b/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
index fde344a..dbcdded 100755
--- a/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
+++ b/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.c
@@ -1306,7 +1306,7 @@
}
};
-MV_BOARD_GPP_INFO gflt200InfoBoardGppInfo[] = {
+MV_BOARD_GPP_INFO gflt200Evt1InfoBoardGppInfo[] = {
/* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */
/*{BOARD_GPP_PON_XVR_TX, 17, 0},*/
/*{BOARD_GPP_PON_XVR_TX_IND, 24, 0},*/
@@ -1314,6 +1314,11 @@
{BOARD_GPP_PON_XVR_TX_POWER, 37, 1},
};
+MV_BOARD_GPP_INFO gflt200Evt2InfoBoardGppInfo[] = {
+ {BOARD_GPP_PON_XVR_TX, 21, 1},
+ {BOARD_GPP_PON_XVR_TX_POWER, 37, 0},
+};
+
MV_DEV_CS_INFO gflt200InfoBoardDeCsInfo[] = {
/*{deviceCS, params, devType, devWidth} */
#ifdef MV_SPI
@@ -1376,6 +1381,9 @@
= MV_ARRAY_SIZE(gflt200Evt1InfoBoardMppConfigValue);
pBoardInfo->pBoardMppConfigValue
= gflt200Evt1InfoBoardMppConfigValue;
+ pBoardInfo->numBoardGppInfo
+ = MV_ARRAY_SIZE(gflt200Evt1InfoBoardGppInfo),
+ pBoardInfo->pBoardGppInfo = gflt200Evt1InfoBoardGppInfo,
pBoardInfo->gppOutEnValLow = GFLT200_EVT1_GPP_OUT_ENA_LOW;
pBoardInfo->gppOutEnValMid = GFLT200_EVT1_GPP_OUT_ENA_MID;
pBoardInfo->gppOutValLow = GFLT200_EVT1_GPP_OUT_VAL_LOW;
@@ -1392,6 +1400,9 @@
= MV_ARRAY_SIZE(gflt200Evt2InfoBoardMppConfigValue);
pBoardInfo->pBoardMppConfigValue
= gflt200Evt2InfoBoardMppConfigValue;
+ pBoardInfo->numBoardGppInfo
+ = MV_ARRAY_SIZE(gflt200Evt2InfoBoardGppInfo),
+ pBoardInfo->pBoardGppInfo = gflt200Evt2InfoBoardGppInfo,
pBoardInfo->gppOutEnValLow = GFLT200_EVT2_GPP_OUT_ENA_LOW;
pBoardInfo->gppOutEnValMid = GFLT200_EVT2_GPP_OUT_ENA_MID;
pBoardInfo->gppOutValLow = GFLT200_EVT2_GPP_OUT_VAL_LOW;
@@ -1416,8 +1427,6 @@
.pBoardTwsiDev = gflt200InfoBoardTwsiDev,
.numBoardMacInfo = MV_ARRAY_SIZE(gflt200InfoBoardMacInfo),
.pBoardMacInfo = gflt200InfoBoardMacInfo,
- .numBoardGppInfo = MV_ARRAY_SIZE(gflt200InfoBoardGppInfo),
- .pBoardGppInfo = gflt200InfoBoardGppInfo,
.activeLedsNumber = 0,
.pLedGppPin = NULL,
.ledsPolarity = 0,
diff --git a/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.h b/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
index 856cc31..0f99e6b 100755
--- a/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
+++ b/arch/arm/mach-feroceon-kw2/kw2_family/boardEnv/mvBoardEnvSpec.h
@@ -473,14 +473,14 @@
****************************************************************************/
#define GFLT200_EVT1_MPP0_7 0x22222220
#define GFLT200_EVT1_MPP8_15 0x00000002
-#define GFLT200_EVT1_MPP16_23 0x00000000
-#define GFLT200_EVT1_MPP24_31 0x40200000
+#define GFLT200_EVT1_MPP16_23 0x50000000
+#define GFLT200_EVT1_MPP24_31 0x40200005
#define GFLT200_EVT1_MPP32_37 0x00000004
#define GFLT200_EVT2_MPP0_7 0x22222220
-#define GFLT200_EVT2_MPP8_15 0x00000002
+#define GFLT200_EVT2_MPP8_15 0x05000002
#define GFLT200_EVT2_MPP16_23 0x00000000
-#define GFLT200_EVT2_MPP24_31 0x40200004
+#define GFLT200_EVT2_MPP24_31 0x40200504
#define GFLT200_EVT2_MPP32_37 0x00000004
/* GPPs
@@ -496,22 +496,21 @@
6 I2C_SCLK (out) ...
7 UART0_TX (out) ...
8 UART0_RX (in) ...
- 9 VDD_MARGIN_EN (out) ---
-10 VDD_MARGIN_CTRL (out) ---
-11 PON_LINK_LED (out) PON_LED_RED (out)
-12 PON_ERROR_LED (out) PON_LED_BLUE (out)
+ 9 VDD_MARGIN_EN (out) PON_LED_BLUE (out)
+10 VDD_MARGIN_CTRL (out) PON_LED_RED (out)
+11 PON_LINK_LED (out) ---
+12 PON_ERROR_LED (out) ---
13 BOARD_VER[0] (in) ...
14 --- GE_LINK_LED (out)
15 BOARD_VER[1] (in) ...
17 SW_RESET (out) ...
18 BOARD_VER[2] (in) ...
21 PON_TX_DIS (out) ...
-22 --- DOLOS_DETECT (in)
23 GE_DATA_LED (out) ---
24 GE_LINK_LED (out) PTP_TRIG_GEN (out)
25 --- PTP_EVENT_REQ (in)
26 PON_C2_DATA (out) GE_DATA_LED (out)
-27 PON_C2_CLK (out) PTP_CLK (in)
+27 PON_C2_CLK (out) DOLOS_DETECT (in)
28 SPI_WP_L (out) ...
29 PON_RX_LOS (in) ...
31 UART1_RX (out) ...
@@ -523,17 +522,17 @@
#define GFLT200_EVT1_GPP_OUT_ENA_LOW (BIT13 | BIT15 | BIT18 | BIT29)
#define GFLT200_EVT1_GPP_OUT_ENA_MID (BIT4)
-#define GFLT200_EVT1_GPP_OUT_VAL_LOW (BIT9 | BIT10 | BIT21 | BIT26 | BIT27 | BIT28)
+#define GFLT200_EVT1_GPP_OUT_VAL_LOW (BIT9 | BIT10 | BIT12 | BIT21 | BIT26 | BIT27 | BIT28)
#define GFLT200_EVT1_GPP_OUT_VAL_MID 0x0
#define GFLT200_EVT1_GPP_POL_LOW 0x0
#define GFLT200_EVT1_GPP_POL_MID 0x0
-#define GFLT200_EVT2_GPP_OUT_ENA_LOW (BIT13 | BIT15 | BIT18 | BIT22 | BIT29)
+#define GFLT200_EVT2_GPP_OUT_ENA_LOW (BIT9 | BIT13 | BIT15 | BIT18 | BIT27 | BIT29)
#define GFLT200_EVT2_GPP_OUT_ENA_MID (BIT4)
#define GFLT200_EVT2_GPP_OUT_VAL_LOW (BIT21 | BIT28)
-#define GFLT200_EVT2_GPP_OUT_VAL_MID 0x0
+#define GFLT200_EVT2_GPP_OUT_VAL_MID (BIT5)
#define GFLT200_EVT2_GPP_POL_LOW 0x0
#define GFLT200_EVT2_GPP_POL_MID 0x0
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index e4f599f..ae51f7a 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -301,6 +301,13 @@
This allows LEDs to be initialised in the ON state.
If unsure, say Y.
+config LEDS_TRIGGER_DONT_CLOBBER_BRIGHTNESS
+ bool "Don't clobber brightness"
+ depends on LEDS_TRIGGERS
+ help
+ This prevents the LED brightness from being clobbered when setting
+ triggers.
+
comment "iptables trigger is under Netfilter config (LED target)"
depends on LEDS_TRIGGERS
diff --git a/drivers/leds/led-triggers.c b/drivers/leds/led-triggers.c
index d8ddd9e..f6bb707 100644
--- a/drivers/leds/led-triggers.c
+++ b/drivers/leds/led-triggers.c
@@ -112,7 +112,9 @@
if (led_cdev->trigger->deactivate)
led_cdev->trigger->deactivate(led_cdev);
led_cdev->trigger = NULL;
+#ifndef CONFIG_LEDS_TRIGGER_DONT_CLOBBER_BRIGHTNESS
led_set_brightness(led_cdev, LED_OFF);
+#endif
}
if (trigger) {
write_lock_irqsave(&trigger->leddev_list_lock, flags);
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 3c20dae..90ceb09 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -202,6 +202,15 @@
This driver can also be built as a module. If so, the module
will be called rtc-x1205.
+config RTC_DRV_PCF8523
+ tristate "NXP PCF8523"
+ help
+ If you say yes here you get support for the NXP PCF8523 RTC
+ chips.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-pcf8523.
+
config RTC_DRV_PCF8563
tristate "Philips PCF8563/Epson RTC8564"
help
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index aa3fbd5..b6e4a76 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -55,6 +55,7 @@
obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o
obj-$(CONFIG_RTC_DRV_PCAP) += rtc-pcap.o
+obj-$(CONFIG_RTC_DRV_PCF8523) += rtc-pcf8523.o
obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o
obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o
obj-$(CONFIG_RTC_DRV_PCF2123) += rtc-pcf2123.o
diff --git a/drivers/rtc/rtc-pcf8523.c b/drivers/rtc/rtc-pcf8523.c
new file mode 100644
index 0000000..8f09191
--- /dev/null
+++ b/drivers/rtc/rtc-pcf8523.c
@@ -0,0 +1,344 @@
+/*
+ * Copyright (C) 2012 Avionic Design GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/bcd.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/rtc.h>
+#ifdef CONFIG_OF
+#include <linux/of.h>
+#endif
+
+#define DRIVER_NAME "rtc-pcf8523"
+
+#define REG_CONTROL1 0x00
+#define REG_CONTROL1_CAP_SEL (1 << 7)
+#define REG_CONTROL1_STOP (1 << 5)
+
+#define REG_CONTROL3 0x02
+#define REG_CONTROL3_PM_BLD (1 << 7) /* battery low detection disabled */
+#define REG_CONTROL3_PM_VDD (1 << 6) /* switch-over disabled */
+#define REG_CONTROL3_PM_DSM (1 << 5) /* direct switching mode */
+#define REG_CONTROL3_PM_MASK 0xe0
+
+#define REG_SECONDS 0x03
+#define REG_SECONDS_OS (1 << 7)
+
+#define REG_MINUTES 0x04
+#define REG_HOURS 0x05
+#define REG_DAYS 0x06
+#define REG_WEEKDAYS 0x07
+#define REG_MONTHS 0x08
+#define REG_YEARS 0x09
+
+struct pcf8523 {
+ struct rtc_device *rtc;
+};
+
+static int pcf8523_read(struct i2c_client *client, u8 reg, u8 *valuep)
+{
+ struct i2c_msg msgs[2];
+ u8 value = 0;
+ int err;
+
+ msgs[0].addr = client->addr;
+ msgs[0].flags = 0;
+ msgs[0].len = sizeof(reg);
+ msgs[0].buf = ®
+
+ msgs[1].addr = client->addr;
+ msgs[1].flags = I2C_M_RD;
+ msgs[1].len = sizeof(value);
+ msgs[1].buf = &value;
+
+ err = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
+ if (err < 0)
+ return err;
+
+ *valuep = value;
+
+ return 0;
+}
+
+static int pcf8523_write(struct i2c_client *client, u8 reg, u8 value)
+{
+ u8 buffer[2] = { reg, value };
+ struct i2c_msg msg;
+ int err;
+
+ msg.addr = client->addr;
+ msg.flags = 0;
+ msg.len = sizeof(buffer);
+ msg.buf = buffer;
+
+ err = i2c_transfer(client->adapter, &msg, 1);
+ if (err < 0)
+ return err;
+
+ return 0;
+}
+
+static int pcf8523_select_capacitance(struct i2c_client *client, bool high)
+{
+ u8 value;
+ int err;
+
+ err = pcf8523_read(client, REG_CONTROL1, &value);
+ if (err < 0)
+ return err;
+
+ if (!high)
+ value &= ~REG_CONTROL1_CAP_SEL;
+ else
+ value |= REG_CONTROL1_CAP_SEL;
+
+ err = pcf8523_write(client, REG_CONTROL1, value);
+ if (err < 0)
+ return err;
+
+ return err;
+}
+
+static int pcf8523_set_pm(struct i2c_client *client, u8 pm)
+{
+ u8 value;
+ int err;
+
+ err = pcf8523_read(client, REG_CONTROL3, &value);
+ if (err < 0)
+ return err;
+
+ value = (value & ~REG_CONTROL3_PM_MASK) | pm;
+
+ err = pcf8523_write(client, REG_CONTROL3, value);
+ if (err < 0)
+ return err;
+
+ return 0;
+}
+
+static int pcf8523_stop_rtc(struct i2c_client *client)
+{
+ u8 value;
+ int err;
+
+ err = pcf8523_read(client, REG_CONTROL1, &value);
+ if (err < 0)
+ return err;
+
+ value |= REG_CONTROL1_STOP;
+
+ err = pcf8523_write(client, REG_CONTROL1, value);
+ if (err < 0)
+ return err;
+
+ return 0;
+}
+
+static int pcf8523_start_rtc(struct i2c_client *client)
+{
+ u8 value;
+ int err;
+
+ err = pcf8523_read(client, REG_CONTROL1, &value);
+ if (err < 0)
+ return err;
+
+ value &= ~REG_CONTROL1_STOP;
+
+ err = pcf8523_write(client, REG_CONTROL1, value);
+ if (err < 0)
+ return err;
+
+ return 0;
+}
+
+static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ u8 start = REG_SECONDS, regs[7];
+ struct i2c_msg msgs[2];
+ int err;
+
+ msgs[0].addr = client->addr;
+ msgs[0].flags = 0;
+ msgs[0].len = 1;
+ msgs[0].buf = &start;
+
+ msgs[1].addr = client->addr;
+ msgs[1].flags = I2C_M_RD;
+ msgs[1].len = sizeof(regs);
+ msgs[1].buf = regs;
+
+ err = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
+ if (err < 0)
+ return err;
+
+ if (regs[0] & REG_SECONDS_OS) {
+ /*
+ * If the oscillator was stopped, try to clear the flag. Upon
+ * power-up the flag is always set, but if we cannot clear it
+ * the oscillator isn't running properly for some reason. The
+ * sensible thing therefore is to return an error, signalling
+ * that the clock cannot be assumed to be correct.
+ */
+
+ regs[0] &= ~REG_SECONDS_OS;
+
+ err = pcf8523_write(client, REG_SECONDS, regs[0]);
+ if (err < 0)
+ return err;
+
+ err = pcf8523_read(client, REG_SECONDS, ®s[0]);
+ if (err < 0)
+ return err;
+
+ if (regs[0] & REG_SECONDS_OS)
+ return -EAGAIN;
+ }
+
+ tm->tm_sec = bcd2bin(regs[0] & 0x7f);
+ tm->tm_min = bcd2bin(regs[1] & 0x7f);
+ tm->tm_hour = bcd2bin(regs[2] & 0x3f);
+ tm->tm_mday = bcd2bin(regs[3] & 0x3f);
+ tm->tm_wday = regs[4] & 0x7;
+ /* rtc month is 1 - 12 */
+ tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1;
+ tm->tm_year = bcd2bin(regs[6]) + 100;
+
+ return rtc_valid_tm(tm);
+}
+
+static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_msg msg;
+ u8 regs[8];
+ int err;
+
+ err = pcf8523_stop_rtc(client);
+ if (err < 0)
+ return err;
+
+ regs[0] = REG_SECONDS;
+ regs[1] = bin2bcd(tm->tm_sec);
+ regs[2] = bin2bcd(tm->tm_min);
+ regs[3] = bin2bcd(tm->tm_hour);
+ regs[4] = bin2bcd(tm->tm_mday);
+ regs[5] = tm->tm_wday;
+ /* rtc month is 1 - 12 */
+ regs[6] = bin2bcd(tm->tm_mon + 1);
+ regs[7] = bin2bcd(tm->tm_year - 100);
+
+ msg.addr = client->addr;
+ msg.flags = 0;
+ msg.len = sizeof(regs);
+ msg.buf = regs;
+
+ err = i2c_transfer(client->adapter, &msg, 1);
+ if (err < 0) {
+ /*
+ * If the time cannot be set, restart the RTC anyway. Note
+ * that errors are ignored if the RTC cannot be started so
+ * that we have a chance to propagate the original error.
+ */
+ pcf8523_start_rtc(client);
+ return err;
+ }
+
+ return pcf8523_start_rtc(client);
+}
+
+static const struct rtc_class_ops pcf8523_rtc_ops = {
+ .read_time = pcf8523_rtc_read_time,
+ .set_time = pcf8523_rtc_set_time,
+};
+
+static int pcf8523_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct pcf8523 *pcf;
+ int err;
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+ return -ENODEV;
+
+ pcf = devm_kzalloc(&client->dev, sizeof(*pcf), GFP_KERNEL);
+ if (!pcf)
+ return -ENOMEM;
+
+ err = pcf8523_select_capacitance(client, true);
+ if (err < 0)
+ return err;
+
+ err = pcf8523_set_pm(client, 0);
+ if (err < 0)
+ return err;
+
+ pcf->rtc = rtc_device_register(DRIVER_NAME, &client->dev,
+ &pcf8523_rtc_ops, THIS_MODULE);
+ if (IS_ERR(pcf->rtc))
+ return PTR_ERR(pcf->rtc);
+
+ i2c_set_clientdata(client, pcf);
+
+ return 0;
+}
+
+static int pcf8523_remove(struct i2c_client *client)
+{
+ struct pcf8523 *pcf = i2c_get_clientdata(client);
+
+ rtc_device_unregister(pcf->rtc);
+
+ return 0;
+}
+
+static const struct i2c_device_id pcf8523_id[] = {
+ { "pcf8523", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, pcf8523_id);
+
+#ifdef CONFIG_OF
+static const struct of_device_id pcf8523_of_match[] = {
+ { .compatible = "nxp,pcf8523" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, pcf8523_of_match);
+#endif
+
+static struct i2c_driver pcf8523_driver = {
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+#ifdef CONFIG_OF
+ .of_match_table = of_match_ptr(pcf8523_of_match),
+#endif
+ },
+ .probe = pcf8523_probe,
+ .remove = pcf8523_remove,
+ .id_table = pcf8523_id,
+};
+
+static int __init pcf8523_init(void)
+{
+ return i2c_add_driver(&pcf8523_driver);
+}
+
+static void __exit pcf8523_exit(void)
+{
+ i2c_del_driver(&pcf8523_driver);
+}
+
+module_init(pcf8523_init);
+module_exit(pcf8523_exit);
+
+MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
+MODULE_DESCRIPTION("NXP PCF8523 RTC driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 426fa8f..53f289e 100755
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -240,7 +240,7 @@
config ORION_WATCHDOG
tristate "Orion watchdog"
- depends on ARCH_ORION5X || ARCH_KIRKWOOD || ARCH_FEROCEON_KW
+ depends on ARCH_ORION5X || ARCH_KIRKWOOD || ARCH_FEROCEON_KW || ARCH_FEROCEON_KW2
help
Say Y here if to include support for the watchdog timer
in the Marvell Orion5x and Kirkwood ARM SoCs.
