Daniel Mentz | 94787a1 | 2013-05-29 21:12:04 -0700 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-s390/processor.h |
| 3 | * |
| 4 | * S390 version |
| 5 | * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation |
| 6 | * Author(s): Hartmut Penner (hp@de.ibm.com), |
| 7 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
| 8 | * |
| 9 | * Derived from "include/asm-i386/processor.h" |
| 10 | * Copyright (C) 1994, Linus Torvalds |
| 11 | */ |
| 12 | |
| 13 | #ifndef __ASM_S390_PROCESSOR_H |
| 14 | #define __ASM_S390_PROCESSOR_H |
| 15 | |
| 16 | #include <linux/linkage.h> |
| 17 | #include <asm/cpu.h> |
| 18 | #include <asm/page.h> |
| 19 | #include <asm/ptrace.h> |
| 20 | #include <asm/setup.h> |
| 21 | |
| 22 | #ifdef __KERNEL__ |
| 23 | /* |
| 24 | * Default implementation of macro that returns current |
| 25 | * instruction pointer ("program counter"). |
| 26 | */ |
| 27 | #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) |
| 28 | |
| 29 | static inline void get_cpu_id(struct cpuid *ptr) |
| 30 | { |
| 31 | asm volatile("stidp %0" : "=Q" (*ptr)); |
| 32 | } |
| 33 | |
| 34 | extern void s390_adjust_jiffies(void); |
| 35 | extern int get_cpu_capability(unsigned int *); |
| 36 | extern const struct seq_operations cpuinfo_op; |
| 37 | extern int sysctl_ieee_emulation_warnings; |
| 38 | |
| 39 | /* |
| 40 | * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. |
| 41 | */ |
| 42 | #ifndef __s390x__ |
| 43 | |
| 44 | #define TASK_SIZE (1UL << 31) |
| 45 | #define TASK_UNMAPPED_BASE (1UL << 30) |
| 46 | |
| 47 | #else /* __s390x__ */ |
| 48 | |
| 49 | #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit) |
| 50 | #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ |
| 51 | (1UL << 30) : (1UL << 41)) |
| 52 | #define TASK_SIZE TASK_SIZE_OF(current) |
| 53 | |
| 54 | #endif /* __s390x__ */ |
| 55 | |
| 56 | #ifdef __KERNEL__ |
| 57 | |
| 58 | #ifndef __s390x__ |
| 59 | #define STACK_TOP (1UL << 31) |
| 60 | #define STACK_TOP_MAX (1UL << 31) |
| 61 | #else /* __s390x__ */ |
| 62 | #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42)) |
| 63 | #define STACK_TOP_MAX (1UL << 42) |
| 64 | #endif /* __s390x__ */ |
| 65 | |
| 66 | |
| 67 | #endif |
| 68 | |
| 69 | #define HAVE_ARCH_PICK_MMAP_LAYOUT |
| 70 | |
| 71 | typedef struct { |
| 72 | __u32 ar4; |
| 73 | } mm_segment_t; |
| 74 | |
| 75 | /* |
| 76 | * Thread structure |
| 77 | */ |
| 78 | struct thread_struct { |
| 79 | s390_fp_regs fp_regs; |
| 80 | unsigned int acrs[NUM_ACRS]; |
| 81 | unsigned long ksp; /* kernel stack pointer */ |
| 82 | mm_segment_t mm_segment; |
| 83 | unsigned long prot_addr; /* address of protection-excep. */ |
| 84 | unsigned int trap_no; |
| 85 | unsigned long gmap_addr; /* address of last gmap fault. */ |
| 86 | struct per_regs per_user; /* User specified PER registers */ |
| 87 | struct per_event per_event; /* Cause of the last PER trap */ |
| 88 | /* pfault_wait is used to block the process on a pfault event */ |
| 89 | unsigned long pfault_wait; |
| 90 | struct list_head list; |
| 91 | }; |
| 92 | |
| 93 | typedef struct thread_struct thread_struct; |
| 94 | |
| 95 | /* |
| 96 | * Stack layout of a C stack frame. |
| 97 | */ |
| 98 | #ifndef __PACK_STACK |
| 99 | struct stack_frame { |
| 100 | unsigned long back_chain; |
| 101 | unsigned long empty1[5]; |
| 102 | unsigned long gprs[10]; |
| 103 | unsigned int empty2[8]; |
| 104 | }; |
| 105 | #else |
| 106 | struct stack_frame { |
| 107 | unsigned long empty1[5]; |
| 108 | unsigned int empty2[8]; |
| 109 | unsigned long gprs[10]; |
| 110 | unsigned long back_chain; |
| 111 | }; |
| 112 | #endif |
| 113 | |
| 114 | #define ARCH_MIN_TASKALIGN 8 |
| 115 | |
| 116 | #define INIT_THREAD { \ |
| 117 | .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ |
| 118 | } |
| 119 | |
| 120 | /* |
| 121 | * Do necessary setup to start up a new thread. |
| 122 | */ |
| 123 | #define start_thread(regs, new_psw, new_stackp) do { \ |
| 124 | regs->psw.mask = psw_user_bits | PSW_MASK_EA | PSW_MASK_BA; \ |
| 125 | regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ |
| 126 | regs->gprs[15] = new_stackp; \ |
| 127 | } while (0) |
| 128 | |
| 129 | #define start_thread31(regs, new_psw, new_stackp) do { \ |
| 130 | regs->psw.mask = psw_user_bits | PSW_MASK_BA; \ |
| 131 | regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ |
| 132 | regs->gprs[15] = new_stackp; \ |
| 133 | crst_table_downgrade(current->mm, 1UL << 31); \ |
| 134 | } while (0) |
| 135 | |
| 136 | /* Forward declaration, a strange C thing */ |
| 137 | struct task_struct; |
| 138 | struct mm_struct; |
| 139 | struct seq_file; |
| 140 | |
| 141 | /* Free all resources held by a thread. */ |
| 142 | extern void release_thread(struct task_struct *); |
| 143 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); |
| 144 | |
| 145 | /* Prepare to copy thread state - unlazy all lazy status */ |
| 146 | #define prepare_to_copy(tsk) do { } while (0) |
| 147 | |
| 148 | /* |
| 149 | * Return saved PC of a blocked thread. |
| 150 | */ |
| 151 | extern unsigned long thread_saved_pc(struct task_struct *t); |
| 152 | |
| 153 | extern void show_code(struct pt_regs *regs); |
| 154 | |
| 155 | unsigned long get_wchan(struct task_struct *p); |
| 156 | #define task_pt_regs(tsk) ((struct pt_regs *) \ |
| 157 | (task_stack_page(tsk) + THREAD_SIZE) - 1) |
| 158 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) |
| 159 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) |
| 160 | |
| 161 | /* |
| 162 | * Give up the time slice of the virtual PU. |
| 163 | */ |
| 164 | static inline void cpu_relax(void) |
| 165 | { |
| 166 | if (MACHINE_HAS_DIAG44) |
| 167 | asm volatile("diag 0,0,68"); |
| 168 | barrier(); |
| 169 | } |
| 170 | |
| 171 | static inline void psw_set_key(unsigned int key) |
| 172 | { |
| 173 | asm volatile("spka 0(%0)" : : "d" (key)); |
| 174 | } |
| 175 | |
| 176 | /* |
| 177 | * Set PSW to specified value. |
| 178 | */ |
| 179 | static inline void __load_psw(psw_t psw) |
| 180 | { |
| 181 | #ifndef __s390x__ |
| 182 | asm volatile("lpsw %0" : : "Q" (psw) : "cc"); |
| 183 | #else |
| 184 | asm volatile("lpswe %0" : : "Q" (psw) : "cc"); |
| 185 | #endif |
| 186 | } |
| 187 | |
| 188 | /* |
| 189 | * Set PSW mask to specified value, while leaving the |
| 190 | * PSW addr pointing to the next instruction. |
| 191 | */ |
| 192 | static inline void __load_psw_mask (unsigned long mask) |
| 193 | { |
| 194 | unsigned long addr; |
| 195 | psw_t psw; |
| 196 | |
| 197 | psw.mask = mask; |
| 198 | |
| 199 | #ifndef __s390x__ |
| 200 | asm volatile( |
| 201 | " basr %0,0\n" |
| 202 | "0: ahi %0,1f-0b\n" |
| 203 | " st %0,%O1+4(%R1)\n" |
| 204 | " lpsw %1\n" |
| 205 | "1:" |
| 206 | : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); |
| 207 | #else /* __s390x__ */ |
| 208 | asm volatile( |
| 209 | " larl %0,1f\n" |
| 210 | " stg %0,%O1+8(%R1)\n" |
| 211 | " lpswe %1\n" |
| 212 | "1:" |
| 213 | : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); |
| 214 | #endif /* __s390x__ */ |
| 215 | } |
| 216 | |
| 217 | /* |
| 218 | * Rewind PSW instruction address by specified number of bytes. |
| 219 | */ |
| 220 | static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) |
| 221 | { |
| 222 | #ifndef __s390x__ |
| 223 | if (psw.addr & PSW_ADDR_AMODE) |
| 224 | /* 31 bit mode */ |
| 225 | return (psw.addr - ilc) | PSW_ADDR_AMODE; |
| 226 | /* 24 bit mode */ |
| 227 | return (psw.addr - ilc) & ((1UL << 24) - 1); |
| 228 | #else |
| 229 | unsigned long mask; |
| 230 | |
| 231 | mask = (psw.mask & PSW_MASK_EA) ? -1UL : |
| 232 | (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : |
| 233 | (1UL << 24) - 1; |
| 234 | return (psw.addr - ilc) & mask; |
| 235 | #endif |
| 236 | } |
| 237 | |
| 238 | /* |
| 239 | * Function to drop a processor into disabled wait state |
| 240 | */ |
| 241 | static inline void ATTRIB_NORET disabled_wait(unsigned long code) |
| 242 | { |
| 243 | unsigned long ctl_buf; |
| 244 | psw_t dw_psw; |
| 245 | |
| 246 | dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; |
| 247 | dw_psw.addr = code; |
| 248 | /* |
| 249 | * Store status and then load disabled wait psw, |
| 250 | * the processor is dead afterwards |
| 251 | */ |
| 252 | #ifndef __s390x__ |
| 253 | asm volatile( |
| 254 | " stctl 0,0,0(%2)\n" |
| 255 | " ni 0(%2),0xef\n" /* switch off protection */ |
| 256 | " lctl 0,0,0(%2)\n" |
| 257 | " stpt 0xd8\n" /* store timer */ |
| 258 | " stckc 0xe0\n" /* store clock comparator */ |
| 259 | " stpx 0x108\n" /* store prefix register */ |
| 260 | " stam 0,15,0x120\n" /* store access registers */ |
| 261 | " std 0,0x160\n" /* store f0 */ |
| 262 | " std 2,0x168\n" /* store f2 */ |
| 263 | " std 4,0x170\n" /* store f4 */ |
| 264 | " std 6,0x178\n" /* store f6 */ |
| 265 | " stm 0,15,0x180\n" /* store general registers */ |
| 266 | " stctl 0,15,0x1c0\n" /* store control registers */ |
| 267 | " oi 0x1c0,0x10\n" /* fake protection bit */ |
| 268 | " lpsw 0(%1)" |
| 269 | : "=m" (ctl_buf) |
| 270 | : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc"); |
| 271 | #else /* __s390x__ */ |
| 272 | asm volatile( |
| 273 | " stctg 0,0,0(%2)\n" |
| 274 | " ni 4(%2),0xef\n" /* switch off protection */ |
| 275 | " lctlg 0,0,0(%2)\n" |
| 276 | " lghi 1,0x1000\n" |
| 277 | " stpt 0x328(1)\n" /* store timer */ |
| 278 | " stckc 0x330(1)\n" /* store clock comparator */ |
| 279 | " stpx 0x318(1)\n" /* store prefix register */ |
| 280 | " stam 0,15,0x340(1)\n"/* store access registers */ |
| 281 | " stfpc 0x31c(1)\n" /* store fpu control */ |
| 282 | " std 0,0x200(1)\n" /* store f0 */ |
| 283 | " std 1,0x208(1)\n" /* store f1 */ |
| 284 | " std 2,0x210(1)\n" /* store f2 */ |
| 285 | " std 3,0x218(1)\n" /* store f3 */ |
| 286 | " std 4,0x220(1)\n" /* store f4 */ |
| 287 | " std 5,0x228(1)\n" /* store f5 */ |
| 288 | " std 6,0x230(1)\n" /* store f6 */ |
| 289 | " std 7,0x238(1)\n" /* store f7 */ |
| 290 | " std 8,0x240(1)\n" /* store f8 */ |
| 291 | " std 9,0x248(1)\n" /* store f9 */ |
| 292 | " std 10,0x250(1)\n" /* store f10 */ |
| 293 | " std 11,0x258(1)\n" /* store f11 */ |
| 294 | " std 12,0x260(1)\n" /* store f12 */ |
| 295 | " std 13,0x268(1)\n" /* store f13 */ |
| 296 | " std 14,0x270(1)\n" /* store f14 */ |
| 297 | " std 15,0x278(1)\n" /* store f15 */ |
| 298 | " stmg 0,15,0x280(1)\n"/* store general registers */ |
| 299 | " stctg 0,15,0x380(1)\n"/* store control registers */ |
| 300 | " oi 0x384(1),0x10\n"/* fake protection bit */ |
| 301 | " lpswe 0(%1)" |
| 302 | : "=m" (ctl_buf) |
| 303 | : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1"); |
| 304 | #endif /* __s390x__ */ |
| 305 | while (1); |
| 306 | } |
| 307 | |
| 308 | /* |
| 309 | * Basic Machine Check/Program Check Handler. |
| 310 | */ |
| 311 | |
| 312 | extern void s390_base_mcck_handler(void); |
| 313 | extern void s390_base_pgm_handler(void); |
| 314 | extern void s390_base_ext_handler(void); |
| 315 | |
| 316 | extern void (*s390_base_mcck_handler_fn)(void); |
| 317 | extern void (*s390_base_pgm_handler_fn)(void); |
| 318 | extern void (*s390_base_ext_handler_fn)(void); |
| 319 | |
| 320 | #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL |
| 321 | |
| 322 | #endif |
| 323 | |
| 324 | /* |
| 325 | * Helper macro for exception table entries |
| 326 | */ |
| 327 | #ifndef __s390x__ |
| 328 | #define EX_TABLE(_fault,_target) \ |
| 329 | ".section __ex_table,\"a\"\n" \ |
| 330 | " .align 4\n" \ |
| 331 | " .long " #_fault "," #_target "\n" \ |
| 332 | ".previous\n" |
| 333 | #else |
| 334 | #define EX_TABLE(_fault,_target) \ |
| 335 | ".section __ex_table,\"a\"\n" \ |
| 336 | " .align 8\n" \ |
| 337 | " .quad " #_fault "," #_target "\n" \ |
| 338 | ".previous\n" |
| 339 | #endif |
| 340 | |
| 341 | #endif /* __ASM_S390_PROCESSOR_H */ |