Daniel Mentz | 94787a1 | 2013-05-29 21:12:04 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP2 clock function prototypes and macros |
| 3 | * |
| 4 | * Copyright (C) 2005-2010 Texas Instruments, Inc. |
| 5 | * Copyright (C) 2004-2010 Nokia Corporation |
| 6 | */ |
| 7 | |
| 8 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H |
| 9 | #define __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H |
| 10 | |
| 11 | unsigned long omap2_table_mpu_recalc(struct clk *clk); |
| 12 | int omap2_select_table_rate(struct clk *clk, unsigned long rate); |
| 13 | long omap2_round_to_table_rate(struct clk *clk, unsigned long rate); |
| 14 | unsigned long omap2xxx_sys_clk_recalc(struct clk *clk); |
| 15 | unsigned long omap2_osc_clk_recalc(struct clk *clk); |
| 16 | unsigned long omap2_dpllcore_recalc(struct clk *clk); |
| 17 | int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate); |
| 18 | unsigned long omap2xxx_clk_get_core_rate(struct clk *clk); |
| 19 | u32 omap2xxx_get_apll_clkin(void); |
| 20 | u32 omap2xxx_get_sysclkdiv(void); |
| 21 | void omap2xxx_clk_prepare_for_reboot(void); |
| 22 | |
| 23 | #ifdef CONFIG_SOC_OMAP2420 |
| 24 | int omap2420_clk_init(void); |
| 25 | #else |
| 26 | #define omap2420_clk_init() do { } while(0) |
| 27 | #endif |
| 28 | |
| 29 | #ifdef CONFIG_SOC_OMAP2430 |
| 30 | int omap2430_clk_init(void); |
| 31 | #else |
| 32 | #define omap2430_clk_init() do { } while(0) |
| 33 | #endif |
| 34 | |
| 35 | extern void __iomem *prcm_clksrc_ctrl, *cm_idlest_pll; |
| 36 | |
| 37 | extern struct clk *dclk; |
| 38 | |
| 39 | extern const struct clkops clkops_omap2430_i2chs_wait; |
| 40 | extern const struct clkops clkops_oscck; |
| 41 | extern const struct clkops clkops_apll96; |
| 42 | extern const struct clkops clkops_apll54; |
| 43 | |
| 44 | #endif |