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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _ASM_IA64_DMA_MAPPING_H
2#define _ASM_IA64_DMA_MAPPING_H
3
4/*
5 * Copyright (C) 2003-2004 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07008#include <asm/machvec.h>
Jens Axboe9b6eccf2007-10-16 11:27:26 +02009#include <linux/scatterlist.h>
Fenghua Yu62fdd762008-10-17 12:14:13 -070010#include <asm/swiotlb.h>
FUJITA Tomonori99162192009-06-17 16:28:14 -070011#include <linux/dma-debug.h>
Fenghua Yu62fdd762008-10-17 12:14:13 -070012
John Keller175add12008-11-24 16:47:17 -060013#define ARCH_HAS_DMA_GET_REQUIRED_MASK
14
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090015extern struct dma_map_ops *dma_ops;
Fenghua Yu62fdd762008-10-17 12:14:13 -070016extern struct ia64_machine_vector ia64_mv;
17extern void set_iommu_machvec(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070018
FUJITA Tomonoric2990302009-01-07 02:13:42 +090019extern void machvec_dma_sync_single(struct device *, dma_addr_t, size_t,
20 enum dma_data_direction);
21extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int,
22 enum dma_data_direction);
23
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090024static inline void *dma_alloc_coherent(struct device *dev, size_t size,
25 dma_addr_t *daddr, gfp_t gfp)
26{
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090027 struct dma_map_ops *ops = platform_dma_get_ops(dev);
FUJITA Tomonori99162192009-06-17 16:28:14 -070028 void *caddr;
29
30 caddr = ops->alloc_coherent(dev, size, daddr, gfp);
31 debug_dma_alloc_coherent(dev, size, *daddr, caddr);
32 return caddr;
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090033}
FUJITA Tomonori3a80b6a2008-09-08 18:10:10 +090034
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090035static inline void dma_free_coherent(struct device *dev, size_t size,
36 void *caddr, dma_addr_t daddr)
Roland Dreierb7de8e72007-02-14 00:32:53 -080037{
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090038 struct dma_map_ops *ops = platform_dma_get_ops(dev);
FUJITA Tomonori99162192009-06-17 16:28:14 -070039 debug_dma_free_coherent(dev, size, caddr, daddr);
FUJITA Tomonoric190ab02009-01-05 23:36:16 +090040 ops->free_coherent(dev, size, caddr, daddr);
Roland Dreierb7de8e72007-02-14 00:32:53 -080041}
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090042
43#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
44#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
45
FUJITA Tomonorid6d0a6a2009-06-17 16:28:13 -070046#define get_dma_ops(dev) platform_dma_get_ops(dev)
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090047
FUJITA Tomonorid6d0a6a2009-06-17 16:28:13 -070048#include <asm-generic/dma-mapping-common.h>
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090049
50static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr)
51{
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090052 struct dma_map_ops *ops = platform_dma_get_ops(dev);
FUJITA Tomonoric190ab02009-01-05 23:36:16 +090053 return ops->mapping_error(dev, daddr);
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090054}
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090056static inline int dma_supported(struct device *dev, u64 mask)
57{
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090058 struct dma_map_ops *ops = platform_dma_get_ops(dev);
59 return ops->dma_supported(dev, mask);
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090060}
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
62static inline int
63dma_set_mask (struct device *dev, u64 mask)
64{
65 if (!dev->dma_mask || !dma_supported(dev, mask))
66 return -EIO;
67 *dev->dma_mask = mask;
68 return 0;
69}
70
FUJITA Tomonoria0b00ca2009-07-10 10:04:56 +090071static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
72{
73 if (!dev->dma_mask)
74 return 0;
75
76 return addr + size <= *dev->dma_mask;
77}
78
FUJITA Tomonori8d4f5332009-07-10 10:05:01 +090079static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
80{
81 return paddr;
82}
83
84static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
85{
86 return daddr;
87}
88
John W. Linvillee1531b42005-11-07 00:57:54 -080089extern int dma_get_cache_alignment(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
91static inline void
Ralf Baechled3fa72e2006-12-06 20:38:56 -080092dma_cache_sync (struct device *dev, void *vaddr, size_t size,
93 enum dma_data_direction dir)
Linus Torvalds1da177e2005-04-16 15:20:36 -070094{
95 /*
96 * IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to
97 * ensure that dma_cache_sync() enforces order, hence the mb().
98 */
99 mb();
100}
101
Ralf Baechlef67637e2006-12-06 20:38:54 -0800102#define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104#endif /* _ASM_IA64_DMA_MAPPING_H */