Merge "Build a thumb2 kernel and config option to turn for cortexa8"
diff --git a/arch/arm/configs/gfrg200_defconfig b/arch/arm/configs/gfrg200_defconfig
index 28dbb05..7379dbd 100644
--- a/arch/arm/configs/gfrg200_defconfig
+++ b/arch/arm/configs/gfrg200_defconfig
@@ -4,6 +4,8 @@
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_RCU_BOOST=y
+CONFIG_RCU_BOOST_DELAY=50
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_CGROUPS=y
 CONFIG_CGROUP_DEVICE=y
@@ -40,6 +42,7 @@
 # CONFIG_SMP_ON_UP is not set
 CONFIG_VMSPLIT_2G=y
 CONFIG_NR_CPUS=2
+CONFIG_PREEMPT=y
 CONFIG_AEABI=y
 # CONFIG_OABI_COMPAT is not set
 CONFIG_ZBOOT_ROM_TEXT=0x3008000
@@ -290,6 +293,8 @@
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
 CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
 # CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_RCU_CPU_STALL_VERBOSE is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_BLK_DEV_IO_TRACE=y
 # CONFIG_ARM_UNWIND is not set
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 87c8be5..89e772b 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -34,6 +34,7 @@
 #include <linux/list.h>
 #include <linux/kallsyms.h>
 #include <linux/proc_fs.h>
+#include <linux/ratelimit.h>
 
 #include <asm/exception.h>
 #include <asm/system.h>
@@ -71,6 +72,8 @@
 void handle_IRQ(unsigned int irq, struct pt_regs *regs)
 {
 	struct pt_regs *old_regs = set_irq_regs(regs);
+	ktime_t kstart, kend, kdiff;
+	unsigned int usdiff;
 
 	irq_enter();
 
@@ -78,6 +81,7 @@
 	 * Some hardware gives randomly wrong interrupts.  Rather
 	 * than crashing, do something sensible.
 	 */
+	kstart = ktime_get();
 	if (unlikely(irq >= nr_irqs)) {
 		if (printk_ratelimit())
 			printk(KERN_WARNING "Bad IRQ%u\n", irq);
@@ -85,6 +89,11 @@
 	} else {
 		generic_handle_irq(irq);
 	}
+	kend = ktime_get();
+	kdiff = ktime_sub(kend, kstart);
+	usdiff = ktime_to_ns(kdiff) / 1024;
+	if (usdiff >= 3000)
+		pr_notice_ratelimited("slowirq %d (%uus)\n", irq, usdiff);
 
 	/* AT91 specific workaround */
 	irq_finish(irq);
diff --git a/arch/arm/mach-comcerto/comcerto-2000.c b/arch/arm/mach-comcerto/comcerto-2000.c
index 9ce93ed..34ef8bf 100644
--- a/arch/arm/mach-comcerto/comcerto-2000.c
+++ b/arch/arm/mach-comcerto/comcerto-2000.c
@@ -1004,6 +1004,12 @@
 
 void __init platform_reserve(void)
 {
+	/* boot_secondary() in arch/arm/mach-comcerto/platsmp.c uses this range
+	 * to store a jump instruction. The second CPU executes this
+	 * instruction when it comes out of reset.*/
+	if (memblock_reserve(0, 0x24) < 0)
+		BUG();
+
 	/* Allocate DDR block used by PFE/MSP, the base address is fixed so that util-pe code can
 	be linked at a fixed address */
 	if (memblock_reserve(COMCERTO_DDR_SHARED_BASE, COMCERTO_DDR_SHARED_SIZE) < 0)