Reserve 0x24 bytes at PA 0 for 2nd CPU bootstrap
When we release the reset line for the second CPU, it starts executing code at
physical address 0. boot_secondary() writes a jump instruction at this address.
To ensure that nobody else is using this range, we need to reserve it for this
purpose very early.
We could free up this range later, but it is conceivable that we want to
hotplug the second CPU for power management. In that case, we would need to be
able to take the CPU offline and subsequently take it back online. Hence, we
need to hang on to this range for the entire life of the system.
Change-Id: I1c86e5911d6c9b9f8e11d50447ab2a5babff82fc
diff --git a/arch/arm/mach-comcerto/comcerto-2000.c b/arch/arm/mach-comcerto/comcerto-2000.c
index 9ce93ed..34ef8bf 100644
--- a/arch/arm/mach-comcerto/comcerto-2000.c
+++ b/arch/arm/mach-comcerto/comcerto-2000.c
@@ -1004,6 +1004,12 @@
void __init platform_reserve(void)
{
+ /* boot_secondary() in arch/arm/mach-comcerto/platsmp.c uses this range
+ * to store a jump instruction. The second CPU executes this
+ * instruction when it comes out of reset.*/
+ if (memblock_reserve(0, 0x24) < 0)
+ BUG();
+
/* Allocate DDR block used by PFE/MSP, the base address is fixed so that util-pe code can
be linked at a fixed address */
if (memblock_reserve(COMCERTO_DDR_SHARED_BASE, COMCERTO_DDR_SHARED_SIZE) < 0)
