Apply dos2unix on dvbsky_m88rs6000.c.
Google-Bug-Id: 19432272
Change-Id: Ie3b60c5e9d622c4733a9ffa31f871c23c5537aaa
diff --git a/drivers/media/dvb/frontends/dvbsky_m88rs6000.c b/drivers/media/dvb/frontends/dvbsky_m88rs6000.c
index ee27a90..f395fcc 100644
--- a/drivers/media/dvb/frontends/dvbsky_m88rs6000.c
+++ b/drivers/media/dvb/frontends/dvbsky_m88rs6000.c
@@ -357,61 +357,61 @@
u16 *signal_strength)
{
struct m88rs6000_state *state = fe->demodulator_priv;
-
- int val;
-
- //u32 RF_GS = 290, IF_GS = 290, BB_GS = 290;
- u32 PGA2_cri_GS = 46, PGA2_crf_GS = 290, TIA_GS = 290;
- u32 RF_GC = 1200, IF_GC = 1100, BB_GC = 300, PGA2_GC = 300, TIA_GC = 300;
- u32 PGA2_cri = 0, PGA2_crf = 0;
- u32 RFG = 0, IFG = 0, BBG = 0, PGA2G = 0, TIAG = 0;
-
- u32 i = 0;
-
- u32 RFGS[13] = {0, 245, 266, 268, 270, 285, 298, 295, 283, 285, 285, 300, 300};
- u32 IFGS[12] = {0, 300, 230, 270, 270, 285, 295, 285, 290, 295, 295, 310};
- u32 BBGS[14] = {0, 286, 275, 290, 294, 300, 290, 290, 285, 283, 260, 295, 290, 260};
+
+ int val;
+
+ //u32 RF_GS = 290, IF_GS = 290, BB_GS = 290;
+ u32 PGA2_cri_GS = 46, PGA2_crf_GS = 290, TIA_GS = 290;
+ u32 RF_GC = 1200, IF_GC = 1100, BB_GC = 300, PGA2_GC = 300, TIA_GC = 300;
+ u32 PGA2_cri = 0, PGA2_crf = 0;
+ u32 RFG = 0, IFG = 0, BBG = 0, PGA2G = 0, TIAG = 0;
+
+ u32 i = 0;
+
+ u32 RFGS[13] = {0, 245, 266, 268, 270, 285, 298, 295, 283, 285, 285, 300, 300};
+ u32 IFGS[12] = {0, 300, 230, 270, 270, 285, 295, 285, 290, 295, 295, 310};
+ u32 BBGS[14] = {0, 286, 275, 290, 294, 300, 290, 290, 285, 283, 260, 295, 290, 260};
dprintk("%s()\n", __func__);
- val = m88rs6000_tuner_readreg(state, 0x5A);
- RF_GC = val & 0x0f;
-
+ val = m88rs6000_tuner_readreg(state, 0x5A);
+ RF_GC = val & 0x0f;
+
val = m88rs6000_tuner_readreg(state, 0x5F);
IF_GC = val & 0x0f;
val = m88rs6000_tuner_readreg(state, 0x3F);
TIA_GC = (val >> 4) & 0x07;
- val = m88rs6000_tuner_readreg(state, 0x77);
- BB_GC = (val >> 4) & 0x0f;
-
- val = m88rs6000_tuner_readreg(state, 0x76);
- PGA2_GC = val & 0x3f;
- PGA2_cri = PGA2_GC >> 2;
- PGA2_crf = PGA2_GC & 0x03;
-
- for(i = 0; i <= RF_GC; i++) {
- RFG += RFGS[i];
- }
-
- if(RF_GC == 0) RFG += 400;
- if(RF_GC == 1) RFG += 300;
- if(RF_GC == 2) RFG += 200;
- if(RF_GC == 3) RFG += 100;
-
- for(i = 0; i <= IF_GC; i++) {
- IFG += IFGS[i];
- }
-
- TIAG = TIA_GC * TIA_GS;
-
- for(i = 0; i <= BB_GC; i++) {
- BBG += BBGS[i];
- }
-
- PGA2G = PGA2_cri * PGA2_cri_GS + PGA2_crf * PGA2_crf_GS;
-
+ val = m88rs6000_tuner_readreg(state, 0x77);
+ BB_GC = (val >> 4) & 0x0f;
+
+ val = m88rs6000_tuner_readreg(state, 0x76);
+ PGA2_GC = val & 0x3f;
+ PGA2_cri = PGA2_GC >> 2;
+ PGA2_crf = PGA2_GC & 0x03;
+
+ for(i = 0; i <= RF_GC; i++) {
+ RFG += RFGS[i];
+ }
+
+ if(RF_GC == 0) RFG += 400;
+ if(RF_GC == 1) RFG += 300;
+ if(RF_GC == 2) RFG += 200;
+ if(RF_GC == 3) RFG += 100;
+
+ for(i = 0; i <= IF_GC; i++) {
+ IFG += IFGS[i];
+ }
+
+ TIAG = TIA_GC * TIA_GS;
+
+ for(i = 0; i <= BB_GC; i++) {
+ BBG += BBGS[i];
+ }
+
+ PGA2G = PGA2_cri * PGA2_cri_GS + PGA2_crf * PGA2_crf_GS;
+
*signal_strength = RFG + IFG - TIAG + BBG + PGA2G;
return 0;
@@ -681,7 +681,7 @@
val_02 = m88rs6000_readreg(state, 0x02);
printk(KERN_INFO "RS6000 chip, demod id=%x, version=%x.\n", val_00, (val_02 << 8 | val_01));
- val_01 = m88rs6000_tuner_readreg(state, 0x01);
+ val_01 = m88rs6000_tuner_readreg(state, 0x01);
printk(KERN_INFO "RS6000 chip, tuner id=%x.\n", val_01);
state->demod_id = 0;
@@ -734,162 +734,162 @@
}
EXPORT_SYMBOL(dvbsky_m88rs6000_attach);
-static int m88rs6000_tuner_set_pll_freq(struct m88rs6000_state *state, u32 tuner_freq_MHz)
-{
- u32 fcry_KHz, ulNDiv1, ulNDiv2, ulNDiv;
- u8 refDiv, ucLoDiv1, ucLomod1, ucLoDiv2, ucLomod2, ucLoDiv, ucLomod;
+static int m88rs6000_tuner_set_pll_freq(struct m88rs6000_state *state, u32 tuner_freq_MHz)
+{
+ u32 fcry_KHz, ulNDiv1, ulNDiv2, ulNDiv;
+ u8 refDiv, ucLoDiv1, ucLomod1, ucLoDiv2, ucLomod2, ucLoDiv, ucLomod;
u8 reg27, reg29, reg2d, reg2e, reg36, reg42, reg42buf, reg83;
-
- fcry_KHz = MT_FE_CRYSTAL_KHZ;
- refDiv = 27;
- reg36 = refDiv - 8;
-
- m88rs6000_tuner_writereg(state, 0x36, reg36);
- m88rs6000_tuner_writereg(state, 0x31, 0x00);
-
- if(reg36 == 19) {
- m88rs6000_tuner_writereg(state, 0x2c, 0x02);
- } else {
- m88rs6000_tuner_writereg(state, 0x2c, 0x00);
- }
-
- if(tuner_freq_MHz >= 1550) {
- ucLoDiv1 = 2;
- ucLomod1 = 0;
- ucLoDiv2 = 2;
- ucLomod2 = 0;
- } else if(tuner_freq_MHz >= 1380) {
- ucLoDiv1 = 3;
- ucLomod1 = 16;
- ucLoDiv2 = 2;
- ucLomod2 = 0;
- } else if(tuner_freq_MHz >= 1070) {
- ucLoDiv1 = 3;
- ucLomod1 = 16;
- ucLoDiv2 = 3;
- ucLomod2 = 16;
- } else if(tuner_freq_MHz >= 1000) {
- ucLoDiv1 = 3;
- ucLomod1 = 16;
- ucLoDiv2 = 4;
- ucLomod2 = 64;
- } else if(tuner_freq_MHz >= 775) {
- ucLoDiv1 = 4;
- ucLomod1 = 64;
- ucLoDiv2 = 4;
- ucLomod2 = 64;
- } else if(tuner_freq_MHz >= 700) {
- ucLoDiv1 = 6;
- ucLomod1 = 48;
- ucLoDiv2 = 4;
- ucLomod2 = 64;
- } else if(tuner_freq_MHz >= 520) {
- ucLoDiv1 = 6;
- ucLomod1 = 48;
- ucLoDiv2 = 6;
- ucLomod2 = 48;
- } else {
- ucLoDiv1 = 8;
- ucLomod1 = 96;
- ucLoDiv2 = 8;
- ucLomod2 = 96;
- }
-
- ulNDiv1 = ((tuner_freq_MHz * ucLoDiv1 * 1000) * refDiv / fcry_KHz - 1024) / 2;
- ulNDiv2 = ((tuner_freq_MHz * ucLoDiv2 * 1000) * refDiv / fcry_KHz - 1024) / 2;
-
- reg27 = (((ulNDiv1 >> 8) & 0x0F) + ucLomod1) & 0x7F;
- m88rs6000_tuner_writereg(state, 0x27, reg27);
- m88rs6000_tuner_writereg(state, 0x28, (u8)(ulNDiv1 & 0xFF));
- reg29 = (((ulNDiv2 >> 8) & 0x0F) + ucLomod2) & 0x7f;
- m88rs6000_tuner_writereg(state, 0x29, reg29);
- m88rs6000_tuner_writereg(state, 0x2a, (u8)(ulNDiv2 & 0xFF));
-
- m88rs6000_tuner_writereg(state, 0x2F, 0xf5);
- m88rs6000_tuner_writereg(state, 0x30, 0x05);
-
- m88rs6000_tuner_writereg(state, 0x08, 0x1f);
- m88rs6000_tuner_writereg(state, 0x08, 0x3f);
- m88rs6000_tuner_writereg(state, 0x09, 0x20);
- m88rs6000_tuner_writereg(state, 0x09, 0x00);
-
- m88rs6000_tuner_writereg(state, 0x3e, 0x11);
-
- m88rs6000_tuner_writereg(state, 0x08, 0x2f);
- m88rs6000_tuner_writereg(state, 0x08, 0x3f);
- m88rs6000_tuner_writereg(state, 0x09, 0x10);
- m88rs6000_tuner_writereg(state, 0x09, 0x00);
- msleep(2);
-
- reg42 = m88rs6000_tuner_readreg(state, 0x42);
-
- m88rs6000_tuner_writereg(state, 0x3e, 0x10);
- m88rs6000_tuner_writereg(state, 0x08, 0x2f);
- m88rs6000_tuner_writereg(state, 0x08, 0x3f);
- m88rs6000_tuner_writereg(state, 0x09, 0x10);
- m88rs6000_tuner_writereg(state, 0x09, 0x00);
- msleep(2);
- reg42buf = m88rs6000_tuner_readreg(state, 0x42);
- if(reg42buf < reg42)
- m88rs6000_tuner_writereg(state, 0x3e, 0x11);
- msleep(5);
-
+
+ fcry_KHz = MT_FE_CRYSTAL_KHZ;
+ refDiv = 27;
+ reg36 = refDiv - 8;
+
+ m88rs6000_tuner_writereg(state, 0x36, reg36);
+ m88rs6000_tuner_writereg(state, 0x31, 0x00);
+
+ if(reg36 == 19) {
+ m88rs6000_tuner_writereg(state, 0x2c, 0x02);
+ } else {
+ m88rs6000_tuner_writereg(state, 0x2c, 0x00);
+ }
+
+ if(tuner_freq_MHz >= 1550) {
+ ucLoDiv1 = 2;
+ ucLomod1 = 0;
+ ucLoDiv2 = 2;
+ ucLomod2 = 0;
+ } else if(tuner_freq_MHz >= 1380) {
+ ucLoDiv1 = 3;
+ ucLomod1 = 16;
+ ucLoDiv2 = 2;
+ ucLomod2 = 0;
+ } else if(tuner_freq_MHz >= 1070) {
+ ucLoDiv1 = 3;
+ ucLomod1 = 16;
+ ucLoDiv2 = 3;
+ ucLomod2 = 16;
+ } else if(tuner_freq_MHz >= 1000) {
+ ucLoDiv1 = 3;
+ ucLomod1 = 16;
+ ucLoDiv2 = 4;
+ ucLomod2 = 64;
+ } else if(tuner_freq_MHz >= 775) {
+ ucLoDiv1 = 4;
+ ucLomod1 = 64;
+ ucLoDiv2 = 4;
+ ucLomod2 = 64;
+ } else if(tuner_freq_MHz >= 700) {
+ ucLoDiv1 = 6;
+ ucLomod1 = 48;
+ ucLoDiv2 = 4;
+ ucLomod2 = 64;
+ } else if(tuner_freq_MHz >= 520) {
+ ucLoDiv1 = 6;
+ ucLomod1 = 48;
+ ucLoDiv2 = 6;
+ ucLomod2 = 48;
+ } else {
+ ucLoDiv1 = 8;
+ ucLomod1 = 96;
+ ucLoDiv2 = 8;
+ ucLomod2 = 96;
+ }
+
+ ulNDiv1 = ((tuner_freq_MHz * ucLoDiv1 * 1000) * refDiv / fcry_KHz - 1024) / 2;
+ ulNDiv2 = ((tuner_freq_MHz * ucLoDiv2 * 1000) * refDiv / fcry_KHz - 1024) / 2;
+
+ reg27 = (((ulNDiv1 >> 8) & 0x0F) + ucLomod1) & 0x7F;
+ m88rs6000_tuner_writereg(state, 0x27, reg27);
+ m88rs6000_tuner_writereg(state, 0x28, (u8)(ulNDiv1 & 0xFF));
+ reg29 = (((ulNDiv2 >> 8) & 0x0F) + ucLomod2) & 0x7f;
+ m88rs6000_tuner_writereg(state, 0x29, reg29);
+ m88rs6000_tuner_writereg(state, 0x2a, (u8)(ulNDiv2 & 0xFF));
+
+ m88rs6000_tuner_writereg(state, 0x2F, 0xf5);
+ m88rs6000_tuner_writereg(state, 0x30, 0x05);
+
+ m88rs6000_tuner_writereg(state, 0x08, 0x1f);
+ m88rs6000_tuner_writereg(state, 0x08, 0x3f);
+ m88rs6000_tuner_writereg(state, 0x09, 0x20);
+ m88rs6000_tuner_writereg(state, 0x09, 0x00);
+
+ m88rs6000_tuner_writereg(state, 0x3e, 0x11);
+
+ m88rs6000_tuner_writereg(state, 0x08, 0x2f);
+ m88rs6000_tuner_writereg(state, 0x08, 0x3f);
+ m88rs6000_tuner_writereg(state, 0x09, 0x10);
+ m88rs6000_tuner_writereg(state, 0x09, 0x00);
+ msleep(2);
+
+ reg42 = m88rs6000_tuner_readreg(state, 0x42);
+
+ m88rs6000_tuner_writereg(state, 0x3e, 0x10);
+ m88rs6000_tuner_writereg(state, 0x08, 0x2f);
+ m88rs6000_tuner_writereg(state, 0x08, 0x3f);
+ m88rs6000_tuner_writereg(state, 0x09, 0x10);
+ m88rs6000_tuner_writereg(state, 0x09, 0x00);
+ msleep(2);
+ reg42buf = m88rs6000_tuner_readreg(state, 0x42);
+ if(reg42buf < reg42)
+ m88rs6000_tuner_writereg(state, 0x3e, 0x11);
+ msleep(5);
+
reg2d = m88rs6000_tuner_readreg(state, 0x2d);
m88rs6000_tuner_writereg(state, 0x2d, reg2d);
reg2e = m88rs6000_tuner_readreg(state, 0x2e);
m88rs6000_tuner_writereg(state, 0x2e, reg2e);
-
- reg27 = m88rs6000_tuner_readreg(state, 0x27);
+
+ reg27 = m88rs6000_tuner_readreg(state, 0x27);
reg27 = reg27 & 0x70;
- reg83 = m88rs6000_tuner_readreg(state, 0x83);
- reg83 = reg83 & 0x70;
-
- if(reg27 == reg83) {
- ucLoDiv = ucLoDiv1;
- ulNDiv = ulNDiv1;
- ucLomod = ucLomod1 / 16;
- } else {
- ucLoDiv = ucLoDiv2;
- ulNDiv = ulNDiv2;
- ucLomod = ucLomod2 / 16;
- }
-
- if ((ucLoDiv == 3) || (ucLoDiv == 6)) {
- refDiv = 18;
- reg36 = refDiv - 8;
- m88rs6000_tuner_writereg(state, 0x36, reg36);
- ulNDiv = ((tuner_freq_MHz * ucLoDiv * 1000) * refDiv / fcry_KHz - 1024) / 2;
- }
-
- reg27 = (0x80 + ((ucLomod << 4) & 0x70) + ((ulNDiv >> 8) & 0x0F)) & 0xFF;
- m88rs6000_tuner_writereg(state, 0x27, reg27);
- m88rs6000_tuner_writereg(state, 0x28, (u8)(ulNDiv & 0xFF));
- m88rs6000_tuner_writereg(state, 0x29, 0x80);
- m88rs6000_tuner_writereg(state, 0x31, 0x03);
-
- if (ucLoDiv == 3) {
- m88rs6000_tuner_writereg(state, 0x3b, 0xCE);
- } else {
- m88rs6000_tuner_writereg(state, 0x3b, 0x8A);
- }
-
- //tuner_lo_freq_KHz = fcry_KHz* (ulNDiv * 2 + 1024) / refDiv / ucLoDiv;
- return 0;
+ reg83 = m88rs6000_tuner_readreg(state, 0x83);
+ reg83 = reg83 & 0x70;
+
+ if(reg27 == reg83) {
+ ucLoDiv = ucLoDiv1;
+ ulNDiv = ulNDiv1;
+ ucLomod = ucLomod1 / 16;
+ } else {
+ ucLoDiv = ucLoDiv2;
+ ulNDiv = ulNDiv2;
+ ucLomod = ucLomod2 / 16;
+ }
+
+ if ((ucLoDiv == 3) || (ucLoDiv == 6)) {
+ refDiv = 18;
+ reg36 = refDiv - 8;
+ m88rs6000_tuner_writereg(state, 0x36, reg36);
+ ulNDiv = ((tuner_freq_MHz * ucLoDiv * 1000) * refDiv / fcry_KHz - 1024) / 2;
+ }
+
+ reg27 = (0x80 + ((ucLomod << 4) & 0x70) + ((ulNDiv >> 8) & 0x0F)) & 0xFF;
+ m88rs6000_tuner_writereg(state, 0x27, reg27);
+ m88rs6000_tuner_writereg(state, 0x28, (u8)(ulNDiv & 0xFF));
+ m88rs6000_tuner_writereg(state, 0x29, 0x80);
+ m88rs6000_tuner_writereg(state, 0x31, 0x03);
+
+ if (ucLoDiv == 3) {
+ m88rs6000_tuner_writereg(state, 0x3b, 0xCE);
+ } else {
+ m88rs6000_tuner_writereg(state, 0x3b, 0x8A);
+ }
+
+ //tuner_lo_freq_KHz = fcry_KHz* (ulNDiv * 2 + 1024) / refDiv / ucLoDiv;
+ return 0;
}
-static int m88rs6000_tuner_set_bb(struct m88rs6000_state *state, u32 symbol_rate_KSs, s32 lpf_offset_KHz)
-{
- u32 f3dB;
- u8 reg40;
-
- f3dB = symbol_rate_KSs * 9 / 14 + 2000;
- f3dB += lpf_offset_KHz;
- if(f3dB < 6000) f3dB = 6000;
- if(f3dB > 43000) f3dB = 43000;
- reg40 = f3dB / 1000;
+static int m88rs6000_tuner_set_bb(struct m88rs6000_state *state, u32 symbol_rate_KSs, s32 lpf_offset_KHz)
+{
+ u32 f3dB;
+ u8 reg40;
+
+ f3dB = symbol_rate_KSs * 9 / 14 + 2000;
+ f3dB += lpf_offset_KHz;
+ if(f3dB < 6000) f3dB = 6000;
+ if(f3dB > 43000) f3dB = 43000;
+ reg40 = f3dB / 1000;
m88rs6000_tuner_writereg(state, 0x40, reg40);
- return 0;
+ return 0;
}
static int m88rs6000_set_carrier_offset(struct dvb_frontend *fe,
@@ -1226,11 +1226,11 @@
target_mclk = 144000;
}
- if((c->symbol_rate / 1000 ) <= 5000) {
- m88rs6000_writereg(state, 0xc0, 0x04);
- m88rs6000_writereg(state, 0x8a, 0x09);
- m88rs6000_writereg(state, 0x8b, 0x22);
- m88rs6000_writereg(state, 0x8c, 0x88);
+ if((c->symbol_rate / 1000 ) <= 5000) {
+ m88rs6000_writereg(state, 0xc0, 0x04);
+ m88rs6000_writereg(state, 0x8a, 0x09);
+ m88rs6000_writereg(state, 0x8b, 0x22);
+ m88rs6000_writereg(state, 0x8c, 0x88);
}
break;
default:
@@ -1243,23 +1243,23 @@
else
ts_clk = 8000;
- m88rs6000_writereg(state, 0x06, 0xe0);
- m88rs6000_set_ts_mclk(state, target_mclk, c->symbol_rate / 1000);
- m88rs6000_writereg(state, 0x06, 0x00);
-
+ m88rs6000_writereg(state, 0x06, 0xe0);
+ m88rs6000_set_ts_mclk(state, target_mclk, c->symbol_rate / 1000);
+ m88rs6000_writereg(state, 0x06, 0x00);
+
m88rs6000_writereg(state, 0x9d, 0x08 | m88rs6000_readreg(state, 0x9d));
m88rs6000_writereg(state, 0x30, 0x80 | m88rs6000_readreg(state, 0x30));
m88rs6000_get_ts_mclk(state, &target_mclk);
- divide_ratio = (target_mclk + ts_clk - 1) / ts_clk;
- if(divide_ratio > 128)
- divide_ratio = 128;
- if(divide_ratio < 2)
- divide_ratio = 2;
- tmp1 = (u8)(divide_ratio / 2);
- tmp2 = (u8)(divide_ratio / 2);
- if((divide_ratio % 2) != 0)
+ divide_ratio = (target_mclk + ts_clk - 1) / ts_clk;
+ if(divide_ratio > 128)
+ divide_ratio = 128;
+ if(divide_ratio < 2)
+ divide_ratio = 2;
+ tmp1 = (u8)(divide_ratio / 2);
+ tmp2 = (u8)(divide_ratio / 2);
+ if((divide_ratio % 2) != 0)
tmp2 += 1;
m88rs6000_set_ts_divide_ratio(state, tmp1, tmp2);
@@ -1277,9 +1277,9 @@
m88rs6000_writereg(state, 0xfd, tmp);
/* set others.*/
- tmp = m88rs6000_readreg(state, 0xca);
- tmp &= 0xFE;
- tmp |= (m88rs6000_readreg(state, 0xfd) >> 3) & 0x01;
+ tmp = m88rs6000_readreg(state, 0xca);
+ tmp &= 0xFE;
+ tmp |= (m88rs6000_readreg(state, 0xfd) >> 3) & 0x01;
m88rs6000_writereg(state, 0xca, tmp);
m88rs6000_writereg(state, 0x33, 0x99);
@@ -1319,55 +1319,55 @@
return 0;
}
-static int m88rs6000_select_mclk(struct m88rs6000_state *state, u32 tuner_freq_MHz, u32 iSymRateKSs)
-{
- u32 adc_Freq_MHz[3] = {96, 93, 99};
- u8 reg16_list[3] = {96, 92, 100}, reg16, reg15;
- u32 offset_MHz[3];
- u32 max_offset = 0;
- u8 i;
-
- if(iSymRateKSs > 45010) {
- reg16 = 115;
- state->iMclkKHz = 110250;
- } else {
- adc_Freq_MHz[0] = 96;
- adc_Freq_MHz[1] = 93;
- adc_Freq_MHz[2] = 99;
- reg16_list[0] = 96;
- reg16_list[1] = 92;
- reg16_list[2] = 100;
- reg16 = 96;
- for(i = 0; i < 3; i++) {
- offset_MHz[i] = tuner_freq_MHz % adc_Freq_MHz[i];
-
- if(offset_MHz[i] > (adc_Freq_MHz[i] / 2))
- offset_MHz[i] = adc_Freq_MHz[i] - offset_MHz[i];
-
- if(offset_MHz[i] > max_offset) {
- max_offset = offset_MHz[i];
- reg16 = reg16_list[i];
- state->iMclkKHz = adc_Freq_MHz[i] * 1000;
-
- if(iSymRateKSs > 45010)
- state->iMclkKHz /= 2;
- }
- }
- }
- reg15 = m88rs6000_tuner_readreg(state, 0x15);
- m88rs6000_tuner_writereg(state, 0x05, 0x40);
- m88rs6000_tuner_writereg(state, 0x11, 0x08);
- if(iSymRateKSs > 45010)
- reg15 |= 0x02;
- else
- reg15 &= ~0x02;
- m88rs6000_tuner_writereg(state, 0x15, reg15);
- m88rs6000_tuner_writereg(state, 0x16, reg16);
- msleep(5);
- m88rs6000_tuner_writereg(state, 0x05, 0x00);
- m88rs6000_tuner_writereg(state, 0x11, (iSymRateKSs > 45010) ? 0x0E : 0x0A);
- msleep(5);
- return 0;
+static int m88rs6000_select_mclk(struct m88rs6000_state *state, u32 tuner_freq_MHz, u32 iSymRateKSs)
+{
+ u32 adc_Freq_MHz[3] = {96, 93, 99};
+ u8 reg16_list[3] = {96, 92, 100}, reg16, reg15;
+ u32 offset_MHz[3];
+ u32 max_offset = 0;
+ u8 i;
+
+ if(iSymRateKSs > 45010) {
+ reg16 = 115;
+ state->iMclkKHz = 110250;
+ } else {
+ adc_Freq_MHz[0] = 96;
+ adc_Freq_MHz[1] = 93;
+ adc_Freq_MHz[2] = 99;
+ reg16_list[0] = 96;
+ reg16_list[1] = 92;
+ reg16_list[2] = 100;
+ reg16 = 96;
+ for(i = 0; i < 3; i++) {
+ offset_MHz[i] = tuner_freq_MHz % adc_Freq_MHz[i];
+
+ if(offset_MHz[i] > (adc_Freq_MHz[i] / 2))
+ offset_MHz[i] = adc_Freq_MHz[i] - offset_MHz[i];
+
+ if(offset_MHz[i] > max_offset) {
+ max_offset = offset_MHz[i];
+ reg16 = reg16_list[i];
+ state->iMclkKHz = adc_Freq_MHz[i] * 1000;
+
+ if(iSymRateKSs > 45010)
+ state->iMclkKHz /= 2;
+ }
+ }
+ }
+ reg15 = m88rs6000_tuner_readreg(state, 0x15);
+ m88rs6000_tuner_writereg(state, 0x05, 0x40);
+ m88rs6000_tuner_writereg(state, 0x11, 0x08);
+ if(iSymRateKSs > 45010)
+ reg15 |= 0x02;
+ else
+ reg15 &= ~0x02;
+ m88rs6000_tuner_writereg(state, 0x15, reg15);
+ m88rs6000_tuner_writereg(state, 0x16, reg16);
+ msleep(5);
+ m88rs6000_tuner_writereg(state, 0x05, 0x00);
+ m88rs6000_tuner_writereg(state, 0x11, (iSymRateKSs > 45010) ? 0x0E : 0x0A);
+ msleep(5);
+ return 0;
}
static int m88rs6000_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters* params)
@@ -1398,17 +1398,17 @@
}
/* set mclk.*/
- m88rs6000_writereg(state, 0x06, 0xe0);
- m88rs6000_select_mclk(state, realFreq / 1000, c->symbol_rate / 1000);
- m88rs6000_set_ts_mclk(state, target_mclk, c->symbol_rate / 1000);
- m88rs6000_writereg(state, 0x06, 0x00);
+ m88rs6000_writereg(state, 0x06, 0xe0);
+ m88rs6000_select_mclk(state, realFreq / 1000, c->symbol_rate / 1000);
+ m88rs6000_set_ts_mclk(state, target_mclk, c->symbol_rate / 1000);
+ m88rs6000_writereg(state, 0x06, 0x00);
msleep(10);
/* set tuner pll.*/
freq_MHz = (realFreq + 500) / 1000;
m88rs6000_tuner_set_pll_freq(state, freq_MHz);
m88rs6000_tuner_set_bb(state, c->symbol_rate / 1000, lpf_offset_KHz);
- m88rs6000_tuner_writereg(state, 0x00, 0x01);
+ m88rs6000_tuner_writereg(state, 0x00, 0x01);
m88rs6000_tuner_writereg(state, 0x00, 0x00);
/* start demod to lock */
diff --git a/drivers/media/dvb/frontends/dvbsky_m88rs6000_priv.h b/drivers/media/dvb/frontends/dvbsky_m88rs6000_priv.h
index c9cda42..5acfe09 100644
--- a/drivers/media/dvb/frontends/dvbsky_m88rs6000_priv.h
+++ b/drivers/media/dvb/frontends/dvbsky_m88rs6000_priv.h
@@ -33,178 +33,178 @@
};
/* For M88RS6000 demod dvbs mode.*/
-static u8 rs6000_dvbs_init_tab[] = {
- 0x23, 0x07,
- 0x08, 0x03,
- 0x0c, 0x02,
- 0x20, 0x00,
- 0x21, 0x54,
- 0x25, 0x82,
- 0x27, 0x31,
- 0x30, 0x08,
- 0x31, 0x40,
- 0x32, 0x32,
- 0x33, 0x35,
- 0x35, 0xff,
- 0x3a, 0x00,
- 0x37, 0x10,
- 0x38, 0x10,
- 0x39, 0x02,
- 0x42, 0x60,
- 0x4a, 0x80,
- 0x4b, 0x04,
- 0x4d, 0x91,
- 0x5d, 0xc8,
- 0x50, 0x36,
- 0x51, 0x36,
- 0x52, 0x36,
- 0x53, 0x36,
- 0x63, 0x0f,
- 0x64, 0x30,
- 0x65, 0x40,
- 0x68, 0x26,
- 0x69, 0x4c,
- 0x70, 0x20,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0x40,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0x60,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0x80,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0xa0,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0x1f,
- 0x76, 0x38,
- 0x77, 0xa6,
- 0x78, 0x0c,
- 0x79, 0x80,
- 0x7f, 0x14,
- 0x7c, 0x00,
- 0xae, 0x82,
- 0x80, 0x64,
- 0x81, 0x66,
- 0x82, 0x44,
- 0x85, 0x04,
- 0xcd, 0xf4,
- 0x90, 0x33,
- 0xa0, 0x44,
- 0xbe, 0x00,
- 0xc0, 0x08,
- 0xc3, 0x10,
- 0xc4, 0x08,
- 0xc5, 0xf0,
- 0xc6, 0xff,
- 0xc7, 0x00,
- 0xc8, 0x1a,
- 0xc9, 0x80,
- 0xe0, 0xf8,
- 0xe6, 0x8b,
- 0xd0, 0x40,
- 0xf8, 0x20,
- 0xfa, 0x0f,
- 0x00, 0x00,
- 0xbd, 0x01,
- 0xb8, 0x00,
+static u8 rs6000_dvbs_init_tab[] = {
+ 0x23, 0x07,
+ 0x08, 0x03,
+ 0x0c, 0x02,
+ 0x20, 0x00,
+ 0x21, 0x54,
+ 0x25, 0x82,
+ 0x27, 0x31,
+ 0x30, 0x08,
+ 0x31, 0x40,
+ 0x32, 0x32,
+ 0x33, 0x35,
+ 0x35, 0xff,
+ 0x3a, 0x00,
+ 0x37, 0x10,
+ 0x38, 0x10,
+ 0x39, 0x02,
+ 0x42, 0x60,
+ 0x4a, 0x80,
+ 0x4b, 0x04,
+ 0x4d, 0x91,
+ 0x5d, 0xc8,
+ 0x50, 0x36,
+ 0x51, 0x36,
+ 0x52, 0x36,
+ 0x53, 0x36,
+ 0x63, 0x0f,
+ 0x64, 0x30,
+ 0x65, 0x40,
+ 0x68, 0x26,
+ 0x69, 0x4c,
+ 0x70, 0x20,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0x40,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0x60,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0x80,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0xa0,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0x1f,
+ 0x76, 0x38,
+ 0x77, 0xa6,
+ 0x78, 0x0c,
+ 0x79, 0x80,
+ 0x7f, 0x14,
+ 0x7c, 0x00,
+ 0xae, 0x82,
+ 0x80, 0x64,
+ 0x81, 0x66,
+ 0x82, 0x44,
+ 0x85, 0x04,
+ 0xcd, 0xf4,
+ 0x90, 0x33,
+ 0xa0, 0x44,
+ 0xbe, 0x00,
+ 0xc0, 0x08,
+ 0xc3, 0x10,
+ 0xc4, 0x08,
+ 0xc5, 0xf0,
+ 0xc6, 0xff,
+ 0xc7, 0x00,
+ 0xc8, 0x1a,
+ 0xc9, 0x80,
+ 0xe0, 0xf8,
+ 0xe6, 0x8b,
+ 0xd0, 0x40,
+ 0xf8, 0x20,
+ 0xfa, 0x0f,
+ 0x00, 0x00,
+ 0xbd, 0x01,
+ 0xb8, 0x00,
};
/* For M88RS6000 demod dvbs2 mode.*/
-static u8 rs6000_dvbs2_init_tab[] = {
- 0x23, 0x07,
- 0x08, 0x07,
- 0x0c, 0x02,
- 0x20, 0x00,
- 0x21, 0x54,
- 0x25, 0x82,
- 0x27, 0x31,
- 0x30, 0x08,
- 0x32, 0x32,
- 0x33, 0x35,
- 0x35, 0xff,
- 0x3a, 0x00,
- 0x37, 0x10,
- 0x38, 0x10,
- 0x39, 0x02,
- 0x42, 0x60,
- 0x4a, 0x80,
- 0x4b, 0x04,
- 0x4d, 0x91,
- 0x5d, 0xc8,
- 0x50, 0x36,
- 0x51, 0x36,
- 0x52, 0x36,
- 0x53, 0x36,
- 0x63, 0x0f,
- 0x64, 0x10,
- 0x65, 0x20,
- 0x68, 0x46,
- 0x69, 0xcd,
- 0x70, 0x20,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0x40,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0x60,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0x80,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0xa0,
- 0x71, 0x70,
- 0x72, 0x04,
- 0x73, 0x00,
- 0x70, 0x1f,
- 0x76, 0x38,
- 0x77, 0xa6,
- 0x78, 0x0c,
- 0x79, 0x80,
- 0x7f, 0x14,
- 0x85, 0x08,
- 0xcd, 0xf4,
- 0x90, 0x33,
- 0x86, 0x00,
- 0x87, 0x0f,
- 0x89, 0x00,
- 0x8b, 0x44,
- 0x8c, 0x66,
- 0x9d, 0xc1,
- 0x8a, 0x10,
- 0xad, 0x40,
- 0xa0, 0x44,
- 0xbe, 0x00,
- 0xc0, 0x08,
- 0xc1, 0x10,
- 0xc2, 0x08,
- 0xc3, 0x10,
- 0xc4, 0x08,
- 0xc5, 0xf0,
- 0xc6, 0xff,
- 0xc7, 0x00,
- 0xc8, 0x1a,
- 0xc9, 0x80,
- 0xca, 0x23,
- 0xcb, 0x24,
- 0xcc, 0xf4,
- 0xce, 0x74,
- 0x00, 0x00,
- 0xbd, 0x01,
- 0xb8, 0x00,
+static u8 rs6000_dvbs2_init_tab[] = {
+ 0x23, 0x07,
+ 0x08, 0x07,
+ 0x0c, 0x02,
+ 0x20, 0x00,
+ 0x21, 0x54,
+ 0x25, 0x82,
+ 0x27, 0x31,
+ 0x30, 0x08,
+ 0x32, 0x32,
+ 0x33, 0x35,
+ 0x35, 0xff,
+ 0x3a, 0x00,
+ 0x37, 0x10,
+ 0x38, 0x10,
+ 0x39, 0x02,
+ 0x42, 0x60,
+ 0x4a, 0x80,
+ 0x4b, 0x04,
+ 0x4d, 0x91,
+ 0x5d, 0xc8,
+ 0x50, 0x36,
+ 0x51, 0x36,
+ 0x52, 0x36,
+ 0x53, 0x36,
+ 0x63, 0x0f,
+ 0x64, 0x10,
+ 0x65, 0x20,
+ 0x68, 0x46,
+ 0x69, 0xcd,
+ 0x70, 0x20,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0x40,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0x60,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0x80,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0xa0,
+ 0x71, 0x70,
+ 0x72, 0x04,
+ 0x73, 0x00,
+ 0x70, 0x1f,
+ 0x76, 0x38,
+ 0x77, 0xa6,
+ 0x78, 0x0c,
+ 0x79, 0x80,
+ 0x7f, 0x14,
+ 0x85, 0x08,
+ 0xcd, 0xf4,
+ 0x90, 0x33,
+ 0x86, 0x00,
+ 0x87, 0x0f,
+ 0x89, 0x00,
+ 0x8b, 0x44,
+ 0x8c, 0x66,
+ 0x9d, 0xc1,
+ 0x8a, 0x10,
+ 0xad, 0x40,
+ 0xa0, 0x44,
+ 0xbe, 0x00,
+ 0xc0, 0x08,
+ 0xc1, 0x10,
+ 0xc2, 0x08,
+ 0xc3, 0x10,
+ 0xc4, 0x08,
+ 0xc5, 0xf0,
+ 0xc6, 0xff,
+ 0xc7, 0x00,
+ 0xc8, 0x1a,
+ 0xc9, 0x80,
+ 0xca, 0x23,
+ 0xcb, 0x24,
+ 0xcc, 0xf4,
+ 0xce, 0x74,
+ 0x00, 0x00,
+ 0xbd, 0x01,
+ 0xb8, 0x00,
};
#endif /* DVBSKY_M88RS6000_PRIV_H */
