| ARM Broadcom STB platforms Device Tree Bindings |
| ----------------------------------------------- |
| Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants) |
| SoC shall have the following DT organization: |
| |
| Required root node properties: |
| - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb" |
| |
| example: |
| / { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| model = "Broadcom STB (bcm7445)"; |
| compatible = "brcm,bcm7445", "brcm,brcmstb"; |
| |
| Further, syscon nodes that map platform-specific registers used for general |
| system control is required: |
| |
| - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon" |
| - compatible: "brcm,bcm<chip_id>-hif-cpubiuctrl", "syscon" |
| - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon" |
| |
| hif-cpubiuctrl node |
| ------------------- |
| |
| Required properties: |
| - compatible: "brcm,bcm<chip_id>-hif-cpubiuctrl", "syscon" |
| |
| Optional properties: |
| - brcm,write-pairing: boolean property, when present indicates |
| that write pairing should be enabled for this chip |
| |
| example: |
| rdb { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| ranges = <0 0x00 0xf0000000 0x1000000>; |
| |
| sun_top_ctrl: syscon@404000 { |
| compatible = "brcm,bcm7445-sun-top-ctrl", "syscon"; |
| reg = <0x404000 0x51c>; |
| }; |
| |
| hif_cpubiuctrl: syscon@3e2400 { |
| compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon"; |
| reg = <0x3e2400 0x5b4>; |
| brcm,write-pairing; |
| }; |
| |
| hif_continuation: syscon@452000 { |
| compatible = "brcm,bcm7445-hif-continuation", "syscon"; |
| reg = <0x452000 0x100>; |
| }; |
| }; |
| |
| Lastly, nodes that allow for support of SMP initialization and reboot are |
| required: |
| |
| smpboot |
| ------- |
| Required properties: |
| |
| - compatible |
| The string "brcm,brcmstb-smpboot". |
| |
| - syscon-cpu |
| A phandle / integer array property which lets the BSP know the location |
| of certain CPU power-on registers. |
| |
| The layout of the property is as follows: |
| o a phandle to the "hif_cpubiuctrl" syscon node |
| o offset to the base CPU power zone register |
| o offset to the base CPU reset register |
| |
| - syscon-cont |
| A phandle pointing to the syscon node which describes the CPU boot |
| continuation registers. |
| o a phandle to the "hif_continuation" syscon node |
| |
| example: |
| smpboot { |
| compatible = "brcm,brcmstb-smpboot"; |
| syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>; |
| syscon-cont = <&hif_continuation>; |
| }; |
| |
| reboot |
| ------- |
| Required properties |
| |
| - compatible |
| The string property "brcm,brcmstb-reboot". |
| |
| - syscon |
| A phandle / integer array that points to the syscon node which describes |
| the general system reset registers. |
| o a phandle to "sun_top_ctrl" |
| o offset to the "reset source enable" register |
| o offset to the "software master reset" register |
| |
| example: |
| reboot { |
| compatible = "brcm,brcmstb-reboot"; |
| syscon = <&sun_top_ctrl 0x304 0x308>; |
| }; |