| config PPC_CELL |
| bool |
| default n |
| |
| config PPC_CELL_COMMON |
| bool |
| select PPC_CELL |
| select PPC_DCR_MMIO |
| select PPC_INDIRECT_PIO |
| select PPC_INDIRECT_MMIO |
| select PPC_NATIVE |
| select PPC_RTAS |
| select IRQ_EDGE_EOI_HANDLER |
| |
| config PPC_CELL_NATIVE |
| bool |
| select PPC_CELL_COMMON |
| select MPIC |
| select PPC_IO_WORKAROUNDS |
| select IBM_EMAC_EMAC4 |
| select IBM_EMAC_RGMII |
| select IBM_EMAC_ZMII #test only |
| select IBM_EMAC_TAH #test only |
| default n |
| |
| config PPC_IBM_CELL_BLADE |
| bool "IBM Cell Blade" |
| depends on PPC64 && PPC_BOOK3S |
| select PPC_CELL_NATIVE |
| select PPC_OF_PLATFORM_PCI |
| select PCI |
| select MMIO_NVRAM |
| select PPC_UDBG_16550 |
| select UDBG_RTAS_CONSOLE |
| |
| config PPC_CELLEB |
| bool "Toshiba's Cell Reference Set 'Celleb' Architecture" |
| depends on PPC64 && PPC_BOOK3S |
| select PPC_CELL_NATIVE |
| select PPC_OF_PLATFORM_PCI |
| select PCI |
| select HAS_TXX9_SERIAL |
| select PPC_UDBG_BEAT |
| select USB_OHCI_BIG_ENDIAN_MMIO |
| select USB_EHCI_BIG_ENDIAN_MMIO |
| |
| config PPC_CELL_QPACE |
| bool "IBM Cell - QPACE" |
| depends on PPC64 && PPC_BOOK3S |
| select PPC_CELL_COMMON |
| |
| config AXON_MSI |
| bool |
| depends on PPC_IBM_CELL_BLADE && PCI_MSI |
| default y |
| |
| menu "Cell Broadband Engine options" |
| depends on PPC_CELL |
| |
| config SPU_FS |
| tristate "SPU file system" |
| default m |
| depends on PPC_CELL |
| select SPU_BASE |
| select MEMORY_HOTPLUG |
| help |
| The SPU file system is used to access Synergistic Processing |
| Units on machines implementing the Broadband Processor |
| Architecture. |
| |
| config SPU_FS_64K_LS |
| bool "Use 64K pages to map SPE local store" |
| # we depend on PPC_MM_SLICES for now rather than selecting |
| # it because we depend on hugetlbfs hooks being present. We |
| # will fix that when the generic code has been improved to |
| # not require hijacking hugetlbfs hooks. |
| depends on SPU_FS && PPC_MM_SLICES && !PPC_64K_PAGES |
| default y |
| select PPC_HAS_HASH_64K |
| help |
| This option causes SPE local stores to be mapped in process |
| address spaces using 64K pages while the rest of the kernel |
| uses 4K pages. This can improve performances of applications |
| using multiple SPEs by lowering the TLB pressure on them. |
| |
| config SPU_BASE |
| bool |
| default n |
| |
| config CBE_RAS |
| bool "RAS features for bare metal Cell BE" |
| depends on PPC_CELL_NATIVE |
| default y |
| |
| config PPC_IBM_CELL_RESETBUTTON |
| bool "IBM Cell Blade Pinhole reset button" |
| depends on CBE_RAS && PPC_IBM_CELL_BLADE |
| default y |
| help |
| Support Pinhole Resetbutton on IBM Cell blades. |
| This adds a method to trigger system reset via front panel pinhole button. |
| |
| config PPC_IBM_CELL_POWERBUTTON |
| tristate "IBM Cell Blade power button" |
| depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV |
| default y |
| help |
| Support Powerbutton on IBM Cell blades. |
| This will enable the powerbutton as an input device. |
| |
| config CBE_THERM |
| tristate "CBE thermal support" |
| default m |
| depends on CBE_RAS && SPU_BASE |
| |
| config PPC_PMI |
| tristate |
| default y |
| depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON |
| help |
| PMI (Platform Management Interrupt) is a way to |
| communicate with the BMC (Baseboard Management Controller). |
| It is used in some IBM Cell blades. |
| |
| config CBE_CPUFREQ_SPU_GOVERNOR |
| tristate "CBE frequency scaling based on SPU usage" |
| depends on SPU_FS && CPU_FREQ |
| default m |
| help |
| This governor checks for spu usage to adjust the cpu frequency. |
| If no spu is running on a given cpu, that cpu will be throttled to |
| the minimal possible frequency. |
| |
| endmenu |
| |
| config OPROFILE_CELL |
| def_bool y |
| depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE |
| |
