| /* |
| * SAMSUNG EXYNOS5250 SoC device tree source |
| * |
| * Copyright (c) 2012 Samsung Electronics Co., Ltd. |
| * http://www.samsung.com |
| * |
| * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file. |
| * EXYNOS5250 based board files can include this file and provide |
| * values for board specfic bindings. |
| * |
| * Note: This file does not include device nodes for all the controllers in |
| * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases, |
| * additional nodes can be added to this file. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| #include "exynos5.dtsi" |
| #include "exynos5250-pinctrl.dtsi" |
| |
| #include <dt-bindings/clk/exynos-audss-clk.h> |
| |
| / { |
| compatible = "samsung,exynos5250"; |
| |
| aliases { |
| spi0 = &spi_0; |
| spi1 = &spi_1; |
| spi2 = &spi_2; |
| gsc0 = &gsc_0; |
| gsc1 = &gsc_1; |
| gsc2 = &gsc_2; |
| gsc3 = &gsc_3; |
| mshc0 = &mmc_0; |
| mshc1 = &mmc_1; |
| mshc2 = &mmc_2; |
| mshc3 = &mmc_3; |
| i2c0 = &i2c_0; |
| i2c1 = &i2c_1; |
| i2c2 = &i2c_2; |
| i2c3 = &i2c_3; |
| i2c4 = &i2c_4; |
| i2c5 = &i2c_5; |
| i2c6 = &i2c_6; |
| i2c7 = &i2c_7; |
| i2c8 = &i2c_8; |
| pinctrl0 = &pinctrl_0; |
| pinctrl1 = &pinctrl_1; |
| pinctrl2 = &pinctrl_2; |
| pinctrl3 = &pinctrl_3; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a15"; |
| reg = <0>; |
| clock-frequency = <1700000000>; |
| }; |
| cpu@1 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a15"; |
| reg = <1>; |
| clock-frequency = <1700000000>; |
| }; |
| }; |
| |
| pd_gsc: gsc-power-domain@10044000 { |
| compatible = "samsung,exynos4210-pd"; |
| reg = <0x10044000 0x20>; |
| }; |
| |
| pd_mfc: mfc-power-domain@10044040 { |
| compatible = "samsung,exynos4210-pd"; |
| reg = <0x10044040 0x20>; |
| }; |
| |
| clock: clock-controller@10010000 { |
| compatible = "samsung,exynos5250-clock"; |
| reg = <0x10010000 0x30000>; |
| #clock-cells = <1>; |
| }; |
| |
| clock_audss: audss-clock-controller@3810000 { |
| compatible = "samsung,exynos5250-audss-clock"; |
| reg = <0x03810000 0x0C>; |
| #clock-cells = <1>; |
| clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>; |
| clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; |
| }; |
| |
| timer { |
| compatible = "arm,armv7-timer"; |
| interrupts = <1 13 0xf08>, |
| <1 14 0xf08>, |
| <1 11 0xf08>, |
| <1 10 0xf08>; |
| /* Unfortunately we need this since some versions of U-Boot |
| * on Exynos don't set the CNTFRQ register, so we need the |
| * value from DT. |
| */ |
| clock-frequency = <24000000>; |
| }; |
| |
| mct@101C0000 { |
| compatible = "samsung,exynos4210-mct"; |
| reg = <0x101C0000 0x800>; |
| interrupt-controller; |
| #interrups-cells = <2>; |
| interrupt-parent = <&mct_map>; |
| interrupts = <0 0>, <1 0>, <2 0>, <3 0>, |
| <4 0>, <5 0>; |
| clocks = <&clock 1>, <&clock 335>; |
| clock-names = "fin_pll", "mct"; |
| |
| mct_map: mct-map { |
| #interrupt-cells = <2>; |
| #address-cells = <0>; |
| #size-cells = <0>; |
| interrupt-map = <0x0 0 &combiner 23 3>, |
| <0x1 0 &combiner 23 4>, |
| <0x2 0 &combiner 25 2>, |
| <0x3 0 &combiner 25 3>, |
| <0x4 0 &gic 0 120 0>, |
| <0x5 0 &gic 0 121 0>; |
| }; |
| }; |
| |
| pmu { |
| compatible = "arm,cortex-a15-pmu"; |
| interrupt-parent = <&combiner>; |
| interrupts = <1 2>, <22 4>; |
| }; |
| |
| pinctrl_0: pinctrl@11400000 { |
| compatible = "samsung,exynos5250-pinctrl"; |
| reg = <0x11400000 0x1000>; |
| interrupts = <0 46 0>; |
| |
| wakup_eint: wakeup-interrupt-controller { |
| compatible = "samsung,exynos4210-wakeup-eint"; |
| interrupt-parent = <&gic>; |
| interrupts = <0 32 0>; |
| }; |
| }; |
| |
| pinctrl_1: pinctrl@13400000 { |
| compatible = "samsung,exynos5250-pinctrl"; |
| reg = <0x13400000 0x1000>; |
| interrupts = <0 45 0>; |
| }; |
| |
| pinctrl_2: pinctrl@10d10000 { |
| compatible = "samsung,exynos5250-pinctrl"; |
| reg = <0x10d10000 0x1000>; |
| interrupts = <0 50 0>; |
| }; |
| |
| pinctrl_3: pinctrl@03860000 { |
| compatible = "samsung,exynos5250-pinctrl"; |
| reg = <0x03860000 0x1000>; |
| interrupts = <0 47 0>; |
| }; |
| |
| watchdog { |
| clocks = <&clock 336>; |
| clock-names = "watchdog"; |
| }; |
| |
| g2d@10850000 { |
| compatible = "samsung,exynos5250-g2d"; |
| reg = <0x10850000 0x1000>; |
| interrupts = <0 91 0>; |
| clocks = <&clock 345>; |
| clock-names = "fimg2d"; |
| }; |
| |
| codec@11000000 { |
| compatible = "samsung,mfc-v6"; |
| reg = <0x11000000 0x10000>; |
| interrupts = <0 96 0>; |
| samsung,power-domain = <&pd_mfc>; |
| clocks = <&clock 266>; |
| clock-names = "mfc"; |
| }; |
| |
| rtc@101E0000 { |
| clocks = <&clock 337>; |
| clock-names = "rtc"; |
| status = "okay"; |
| }; |
| |
| tmu@10060000 { |
| compatible = "samsung,exynos5250-tmu"; |
| reg = <0x10060000 0x100>; |
| interrupts = <0 65 0>; |
| clocks = <&clock 338>; |
| clock-names = "tmu_apbif"; |
| }; |
| |
| serial@12C00000 { |
| clocks = <&clock 289>, <&clock 146>; |
| clock-names = "uart", "clk_uart_baud0"; |
| }; |
| |
| serial@12C10000 { |
| clocks = <&clock 290>, <&clock 147>; |
| clock-names = "uart", "clk_uart_baud0"; |
| }; |
| |
| serial@12C20000 { |
| clocks = <&clock 291>, <&clock 148>; |
| clock-names = "uart", "clk_uart_baud0"; |
| }; |
| |
| serial@12C30000 { |
| clocks = <&clock 292>, <&clock 149>; |
| clock-names = "uart", "clk_uart_baud0"; |
| }; |
| |
| sata@122F0000 { |
| compatible = "samsung,exynos5-sata-ahci"; |
| reg = <0x122F0000 0x1ff>; |
| interrupts = <0 115 0>; |
| clocks = <&clock 277>, <&clock 143>; |
| clock-names = "sata", "sclk_sata"; |
| }; |
| |
| sata-phy@12170000 { |
| compatible = "samsung,exynos5-sata-phy"; |
| reg = <0x12170000 0x1ff>; |
| }; |
| |
| i2c_0: i2c@12C60000 { |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x12C60000 0x100>; |
| interrupts = <0 56 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 294>; |
| clock-names = "i2c"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_bus>; |
| status = "disabled"; |
| }; |
| |
| i2c_1: i2c@12C70000 { |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x12C70000 0x100>; |
| interrupts = <0 57 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 295>; |
| clock-names = "i2c"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c1_bus>; |
| status = "disabled"; |
| }; |
| |
| i2c_2: i2c@12C80000 { |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x12C80000 0x100>; |
| interrupts = <0 58 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 296>; |
| clock-names = "i2c"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c2_bus>; |
| status = "disabled"; |
| }; |
| |
| i2c_3: i2c@12C90000 { |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x12C90000 0x100>; |
| interrupts = <0 59 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 297>; |
| clock-names = "i2c"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c3_bus>; |
| status = "disabled"; |
| }; |
| |
| i2c_4: i2c@12CA0000 { |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x12CA0000 0x100>; |
| interrupts = <0 60 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 298>; |
| clock-names = "i2c"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c4_bus>; |
| status = "disabled"; |
| }; |
| |
| i2c_5: i2c@12CB0000 { |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x12CB0000 0x100>; |
| interrupts = <0 61 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 299>; |
| clock-names = "i2c"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c5_bus>; |
| status = "disabled"; |
| }; |
| |
| i2c_6: i2c@12CC0000 { |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x12CC0000 0x100>; |
| interrupts = <0 62 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 300>; |
| clock-names = "i2c"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c6_bus>; |
| status = "disabled"; |
| }; |
| |
| i2c_7: i2c@12CD0000 { |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x12CD0000 0x100>; |
| interrupts = <0 63 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 301>; |
| clock-names = "i2c"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c7_bus>; |
| status = "disabled"; |
| }; |
| |
| i2c_8: i2c@12CE0000 { |
| compatible = "samsung,s3c2440-hdmiphy-i2c"; |
| reg = <0x12CE0000 0x1000>; |
| interrupts = <0 64 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 302>; |
| clock-names = "i2c"; |
| status = "disabled"; |
| }; |
| |
| i2c@121D0000 { |
| compatible = "samsung,exynos5-sata-phy-i2c"; |
| reg = <0x121D0000 0x100>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 288>; |
| clock-names = "i2c"; |
| status = "disabled"; |
| }; |
| |
| spi_0: spi@12d20000 { |
| compatible = "samsung,exynos4210-spi"; |
| status = "disabled"; |
| reg = <0x12d20000 0x100>; |
| interrupts = <0 66 0>; |
| dmas = <&pdma0 5 |
| &pdma0 4>; |
| dma-names = "tx", "rx"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 304>, <&clock 154>; |
| clock-names = "spi", "spi_busclk0"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi0_bus>; |
| }; |
| |
| spi_1: spi@12d30000 { |
| compatible = "samsung,exynos4210-spi"; |
| status = "disabled"; |
| reg = <0x12d30000 0x100>; |
| interrupts = <0 67 0>; |
| dmas = <&pdma1 5 |
| &pdma1 4>; |
| dma-names = "tx", "rx"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 305>, <&clock 155>; |
| clock-names = "spi", "spi_busclk0"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi1_bus>; |
| }; |
| |
| spi_2: spi@12d40000 { |
| compatible = "samsung,exynos4210-spi"; |
| status = "disabled"; |
| reg = <0x12d40000 0x100>; |
| interrupts = <0 68 0>; |
| dmas = <&pdma0 7 |
| &pdma0 6>; |
| dma-names = "tx", "rx"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 306>, <&clock 156>; |
| clock-names = "spi", "spi_busclk0"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi2_bus>; |
| }; |
| |
| mmc_0: mmc@12200000 { |
| compatible = "samsung,exynos5250-dw-mshc"; |
| interrupts = <0 75 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x12200000 0x1000>; |
| clocks = <&clock 280>, <&clock 139>; |
| clock-names = "biu", "ciu"; |
| fifo-depth = <0x80>; |
| status = "disabled"; |
| }; |
| |
| mmc_1: mmc@12210000 { |
| compatible = "samsung,exynos5250-dw-mshc"; |
| interrupts = <0 76 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x12210000 0x1000>; |
| clocks = <&clock 281>, <&clock 140>; |
| clock-names = "biu", "ciu"; |
| fifo-depth = <0x80>; |
| status = "disabled"; |
| }; |
| |
| mmc_2: mmc@12220000 { |
| compatible = "samsung,exynos5250-dw-mshc"; |
| interrupts = <0 77 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x12220000 0x1000>; |
| clocks = <&clock 282>, <&clock 141>; |
| clock-names = "biu", "ciu"; |
| fifo-depth = <0x80>; |
| status = "disabled"; |
| }; |
| |
| mmc_3: mmc@12230000 { |
| compatible = "samsung,exynos5250-dw-mshc"; |
| reg = <0x12230000 0x1000>; |
| interrupts = <0 78 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clock 283>, <&clock 142>; |
| clock-names = "biu", "ciu"; |
| fifo-depth = <0x80>; |
| status = "disabled"; |
| }; |
| |
| i2s0: i2s@03830000 { |
| compatible = "samsung,s5pv210-i2s"; |
| status = "disabled"; |
| reg = <0x03830000 0x100>; |
| dmas = <&pdma0 10 |
| &pdma0 9 |
| &pdma0 8>; |
| dma-names = "tx", "rx", "tx-sec"; |
| clocks = <&clock_audss EXYNOS_I2S_BUS>, |
| <&clock_audss EXYNOS_I2S_BUS>, |
| <&clock_audss EXYNOS_SCLK_I2S>; |
| clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; |
| samsung,idma-addr = <0x03000000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2s0_bus>; |
| }; |
| |
| i2s1: i2s@12D60000 { |
| compatible = "samsung,s3c6410-i2s"; |
| status = "disabled"; |
| reg = <0x12D60000 0x100>; |
| dmas = <&pdma1 12 |
| &pdma1 11>; |
| dma-names = "tx", "rx"; |
| clocks = <&clock 307>, <&clock 157>; |
| clock-names = "iis", "i2s_opclk0"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2s1_bus>; |
| }; |
| |
| i2s2: i2s@12D70000 { |
| compatible = "samsung,s3c6410-i2s"; |
| status = "disabled"; |
| reg = <0x12D70000 0x100>; |
| dmas = <&pdma0 12 |
| &pdma0 11>; |
| dma-names = "tx", "rx"; |
| clocks = <&clock 308>, <&clock 158>; |
| clock-names = "iis", "i2s_opclk0"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2s2_bus>; |
| }; |
| |
| usb@12000000 { |
| compatible = "samsung,exynos5250-dwusb3"; |
| clocks = <&clock 286>; |
| clock-names = "usbdrd30"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| dwc3 { |
| compatible = "synopsys,dwc3"; |
| reg = <0x12000000 0x10000>; |
| interrupts = <0 72 0>; |
| usb-phy = <&usb2_phy &usb3_phy>; |
| }; |
| }; |
| |
| usb3_phy: usbphy@12100000 { |
| compatible = "samsung,exynos5250-usb3phy"; |
| reg = <0x12100000 0x100>; |
| clocks = <&clock 1>, <&clock 286>; |
| clock-names = "ext_xtal", "usbdrd30"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| usbphy-sys { |
| reg = <0x10040704 0x8>; |
| }; |
| }; |
| |
| usb@12110000 { |
| compatible = "samsung,exynos4210-ehci"; |
| reg = <0x12110000 0x100>; |
| interrupts = <0 71 0>; |
| |
| clocks = <&clock 285>; |
| clock-names = "usbhost"; |
| }; |
| |
| usb@12120000 { |
| compatible = "samsung,exynos4210-ohci"; |
| reg = <0x12120000 0x100>; |
| interrupts = <0 71 0>; |
| |
| clocks = <&clock 285>; |
| clock-names = "usbhost"; |
| }; |
| |
| usb2_phy: usbphy@12130000 { |
| compatible = "samsung,exynos5250-usb2phy"; |
| reg = <0x12130000 0x100>; |
| clocks = <&clock 1>, <&clock 285>; |
| clock-names = "ext_xtal", "usbhost"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| usbphy-sys { |
| reg = <0x10040704 0x8>, |
| <0x10050230 0x4>; |
| }; |
| }; |
| |
| pwm: pwm@12dd0000 { |
| compatible = "samsung,exynos4210-pwm"; |
| reg = <0x12dd0000 0x100>; |
| samsung,pwm-outputs = <0>, <1>, <2>, <3>; |
| #pwm-cells = <3>; |
| clocks = <&clock 311>; |
| clock-names = "timers"; |
| }; |
| |
| amba { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "arm,amba-bus"; |
| interrupt-parent = <&gic>; |
| ranges; |
| |
| pdma0: pdma@121A0000 { |
| compatible = "arm,pl330", "arm,primecell"; |
| reg = <0x121A0000 0x1000>; |
| interrupts = <0 34 0>; |
| clocks = <&clock 275>; |
| clock-names = "apb_pclk"; |
| #dma-cells = <1>; |
| #dma-channels = <8>; |
| #dma-requests = <32>; |
| }; |
| |
| pdma1: pdma@121B0000 { |
| compatible = "arm,pl330", "arm,primecell"; |
| reg = <0x121B0000 0x1000>; |
| interrupts = <0 35 0>; |
| clocks = <&clock 276>; |
| clock-names = "apb_pclk"; |
| #dma-cells = <1>; |
| #dma-channels = <8>; |
| #dma-requests = <32>; |
| }; |
| |
| mdma0: mdma@10800000 { |
| compatible = "arm,pl330", "arm,primecell"; |
| reg = <0x10800000 0x1000>; |
| interrupts = <0 33 0>; |
| clocks = <&clock 346>; |
| clock-names = "apb_pclk"; |
| #dma-cells = <1>; |
| #dma-channels = <8>; |
| #dma-requests = <1>; |
| }; |
| |
| mdma1: mdma@11C10000 { |
| compatible = "arm,pl330", "arm,primecell"; |
| reg = <0x11C10000 0x1000>; |
| interrupts = <0 124 0>; |
| clocks = <&clock 271>; |
| clock-names = "apb_pclk"; |
| #dma-cells = <1>; |
| #dma-channels = <8>; |
| #dma-requests = <1>; |
| }; |
| }; |
| |
| gsc_0: gsc@13e00000 { |
| compatible = "samsung,exynos5-gsc"; |
| reg = <0x13e00000 0x1000>; |
| interrupts = <0 85 0>; |
| samsung,power-domain = <&pd_gsc>; |
| clocks = <&clock 256>; |
| clock-names = "gscl"; |
| }; |
| |
| gsc_1: gsc@13e10000 { |
| compatible = "samsung,exynos5-gsc"; |
| reg = <0x13e10000 0x1000>; |
| interrupts = <0 86 0>; |
| samsung,power-domain = <&pd_gsc>; |
| clocks = <&clock 257>; |
| clock-names = "gscl"; |
| }; |
| |
| gsc_2: gsc@13e20000 { |
| compatible = "samsung,exynos5-gsc"; |
| reg = <0x13e20000 0x1000>; |
| interrupts = <0 87 0>; |
| samsung,power-domain = <&pd_gsc>; |
| clocks = <&clock 258>; |
| clock-names = "gscl"; |
| }; |
| |
| gsc_3: gsc@13e30000 { |
| compatible = "samsung,exynos5-gsc"; |
| reg = <0x13e30000 0x1000>; |
| interrupts = <0 88 0>; |
| samsung,power-domain = <&pd_gsc>; |
| clocks = <&clock 259>; |
| clock-names = "gscl"; |
| }; |
| |
| hdmi { |
| compatible = "samsung,exynos4212-hdmi"; |
| reg = <0x14530000 0x70000>; |
| interrupts = <0 95 0>; |
| clocks = <&clock 344>, <&clock 136>, <&clock 137>, |
| <&clock 159>, <&clock 1024>; |
| clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", |
| "sclk_hdmiphy", "mout_hdmi"; |
| }; |
| |
| mixer { |
| compatible = "samsung,exynos5250-mixer"; |
| reg = <0x14450000 0x10000>; |
| interrupts = <0 94 0>; |
| clocks = <&clock 343>, <&clock 136>; |
| clock-names = "mixer", "sclk_hdmi"; |
| }; |
| |
| dp_phy: video-phy@10040720 { |
| compatible = "samsung,exynos5250-dp-video-phy"; |
| reg = <0x10040720 4>; |
| #phy-cells = <0>; |
| }; |
| |
| dp-controller@145B0000 { |
| clocks = <&clock 342>; |
| clock-names = "dp"; |
| phys = <&dp_phy>; |
| phy-names = "dp"; |
| }; |
| |
| fimd@14400000 { |
| clocks = <&clock 133>, <&clock 339>; |
| clock-names = "sclk_fimd", "fimd"; |
| }; |
| |
| adc: adc@12D10000 { |
| compatible = "samsung,exynos-adc-v1"; |
| reg = <0x12D10000 0x100>, <0x10040718 0x4>; |
| interrupts = <0 106 0>; |
| clocks = <&clock 303>; |
| clock-names = "adc"; |
| #io-channel-cells = <1>; |
| io-channel-ranges; |
| status = "disabled"; |
| }; |
| }; |
