| # |
| # Coresight configuration |
| # |
| menuconfig CORESIGHT |
| bool "CoreSight Tracing Support" |
| select ARM_AMBA |
| help |
| This framework provides a kernel interface for the CoreSight debug |
| and trace drivers to register themselves with. It's intended to build |
| a topological view of the CoreSight components based on a DT |
| specification and configure the right serie of components when a |
| trace source gets enabled. |
| |
| if CORESIGHT |
| config CORESIGHT_LINKS_AND_SINKS |
| bool "CoreSight Link and Sink drivers" |
| help |
| This enables support for CoreSight link and sink drivers that are |
| responsible for transporting and collecting the trace data |
| respectively. Link and sinks are dynamically aggregated with a trace |
| entity at run time to form a complete trace path. |
| |
| config CORESIGHT_LINK_AND_SINK_TMC |
| bool "Coresight generic TMC driver" |
| depends on CORESIGHT_LINKS_AND_SINKS |
| help |
| This enables support for the Trace Memory Controller driver. |
| Depending on its configuration the device can act as a link (embedded |
| trace router - ETR) or sink (embedded trace FIFO). The driver |
| complies with the generic implementation of the component without |
| special enhancement or added features. |
| |
| config CORESIGHT_SINK_TPIU |
| bool "Coresight generic TPIU driver" |
| depends on CORESIGHT_LINKS_AND_SINKS |
| help |
| This enables support for the Trace Port Interface Unit driver, |
| responsible for bridging the gap between the on-chip coresight |
| components and a trace for bridging the gap between the on-chip |
| coresight components and a trace port collection engine, typically |
| connected to an external host for use case capturing more traces than |
| the on-board coresight memory can handle. |
| |
| config CORESIGHT_SINK_ETBV10 |
| bool "Coresight ETBv1.0 driver" |
| depends on CORESIGHT_LINKS_AND_SINKS |
| help |
| This enables support for the Embedded Trace Buffer version 1.0 driver |
| that complies with the generic implementation of the component without |
| special enhancement or added features. |
| |
| config CORESIGHT_SOURCE_ETM3X |
| bool "CoreSight Embedded Trace Macrocell 3.x driver" |
| depends on !ARM64 |
| select CORESIGHT_LINKS_AND_SINKS |
| help |
| This driver provides support for processor ETM3.x and PTM1.x modules, |
| which allows tracing the instructions that a processor is executing |
| This is primarily useful for instruction level tracing. Depending |
| the ETM version data tracing may also be available. |
| |
| config CORESIGHT_SOURCE_ETM4X |
| bool "CoreSight Embedded Trace Macrocell 4.x driver" |
| depends on ARM64 |
| select CORESIGHT_LINKS_AND_SINKS |
| help |
| This driver provides support for the ETM4.x tracer module, tracing the |
| instructions that a processor is executing. This is primarily useful |
| for instruction level tracing. Depending on the implemented version |
| data tracing may also be available. |
| |
| config CORESIGHT_QCOM_REPLICATOR |
| bool "Qualcomm CoreSight Replicator driver" |
| depends on CORESIGHT_LINKS_AND_SINKS |
| help |
| This enables support for Qualcomm CoreSight link driver. The |
| programmable ATB replicator sends the ATB trace stream from the |
| ETB/ETF to the TPIUi and ETR. |
| |
| endif |
