blob: 53432c2cdfc2ea15bff900bb4e6006c8f264a679 [file] [log] [blame]
/***************************************************************************
* Copyright (c) 1999-2012, Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
* Module Description:
* DO NOT EDIT THIS FILE DIRECTLY
*
* This module was generated magically with RDB from a source description
* file. You must edit the source file for changes to be made to this file.
*
*
* Date: Generated on Wed Oct 17 03:11:32 2012
* MD5 Checksum d41d8cd98f00b204e9800998ecf8427e
*
* Compiled with: RDB Utility combo_header.pl
* RDB Parser 3.0
* unknown unknown
* Perl Interpreter 5.008008
* Operating System linux
*
* Revision History:
*
* $brcm_Log: $
*
***************************************************************************/
#ifndef BCHP_HIF_CONTINUATION_H__
#define BCHP_HIF_CONTINUATION_H__
/***************************************************************************
*HIF_CONTINUATION - HIF Boot Continuation Registers
***************************************************************************/
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR0 0x00452000 /* Higher 8-bit of HIF's Read-only STB Boot Continuation Address 0 Register */
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR0 0x00452004 /* Lower 32-bit of HIF's Read-only STB Boot Continuation Address 0 Register */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR1 0x00452008 /* Higher 8-bit of HIF's STB Boot Continuation Address 1 Register */
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR1 0x0045200c /* Lower 32-bit of HIF's STB Boot Continuation Address 1 Register */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR2 0x00452010 /* Higher 8-bit of HIF's STB Boot Continuation Address 2 Register */
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR2 0x00452014 /* Lower 32-bit of HIF's STB Boot Continuation Address 2 Register */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR3 0x00452018 /* Higher 8-bit of HIF's STB Boot Continuation Address 3 Register */
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR3 0x0045201c /* Lower 32-bit of HIF's STB Boot Continuation Address 3 Register */
#define BCHP_HIF_CONTINUATION_WEB_BOOT_HI_ADDR0 0x004520f8 /* Higher 8-bit of HIF's WEB Boot Continuation Address 0 Register */
#define BCHP_HIF_CONTINUATION_WEB_BOOT_ADDR0 0x004520fc /* Lower 32-bit of HIF's WEB Boot Continuation Address 0 Register */
/***************************************************************************
*STB_BOOT_HI_ADDR0 - Higher 8-bit of HIF's Read-only STB Boot Continuation Address 0 Register
***************************************************************************/
/* HIF_CONTINUATION :: STB_BOOT_HI_ADDR0 :: reserved0 [31:08] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR0_reserved0_MASK 0xffffff00
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR0_reserved0_SHIFT 8
/* HIF_CONTINUATION :: STB_BOOT_HI_ADDR0 :: ADDRESS [07:00] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR0_ADDRESS_MASK 0x000000ff
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR0_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR0_ADDRESS_DEFAULT 0x00000000
/***************************************************************************
*STB_BOOT_ADDR0 - Lower 32-bit of HIF's Read-only STB Boot Continuation Address 0 Register
***************************************************************************/
/* HIF_CONTINUATION :: STB_BOOT_ADDR0 :: ADDRESS [31:00] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR0_ADDRESS_MASK 0xffffffff
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR0_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR0_ADDRESS_DEFAULT 0xe0000000
/***************************************************************************
*STB_BOOT_HI_ADDR1 - Higher 8-bit of HIF's STB Boot Continuation Address 1 Register
***************************************************************************/
/* HIF_CONTINUATION :: STB_BOOT_HI_ADDR1 :: reserved0 [31:08] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR1_reserved0_MASK 0xffffff00
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR1_reserved0_SHIFT 8
/* HIF_CONTINUATION :: STB_BOOT_HI_ADDR1 :: ADDRESS [07:00] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR1_ADDRESS_MASK 0x000000ff
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR1_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR1_ADDRESS_DEFAULT 0x00000000
/***************************************************************************
*STB_BOOT_ADDR1 - Lower 32-bit of HIF's STB Boot Continuation Address 1 Register
***************************************************************************/
/* HIF_CONTINUATION :: STB_BOOT_ADDR1 :: ADDRESS [31:00] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR1_ADDRESS_MASK 0xffffffff
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR1_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR1_ADDRESS_DEFAULT 0xffff0000
/***************************************************************************
*STB_BOOT_HI_ADDR2 - Higher 8-bit of HIF's STB Boot Continuation Address 2 Register
***************************************************************************/
/* HIF_CONTINUATION :: STB_BOOT_HI_ADDR2 :: reserved0 [31:08] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR2_reserved0_MASK 0xffffff00
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR2_reserved0_SHIFT 8
/* HIF_CONTINUATION :: STB_BOOT_HI_ADDR2 :: ADDRESS [07:00] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR2_ADDRESS_MASK 0x000000ff
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR2_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR2_ADDRESS_DEFAULT 0x00000000
/***************************************************************************
*STB_BOOT_ADDR2 - Lower 32-bit of HIF's STB Boot Continuation Address 2 Register
***************************************************************************/
/* HIF_CONTINUATION :: STB_BOOT_ADDR2 :: ADDRESS [31:00] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR2_ADDRESS_MASK 0xffffffff
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR2_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR2_ADDRESS_DEFAULT 0xffff0000
/***************************************************************************
*STB_BOOT_HI_ADDR3 - Higher 8-bit of HIF's STB Boot Continuation Address 3 Register
***************************************************************************/
/* HIF_CONTINUATION :: STB_BOOT_HI_ADDR3 :: reserved0 [31:08] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR3_reserved0_MASK 0xffffff00
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR3_reserved0_SHIFT 8
/* HIF_CONTINUATION :: STB_BOOT_HI_ADDR3 :: ADDRESS [07:00] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR3_ADDRESS_MASK 0x000000ff
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR3_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_STB_BOOT_HI_ADDR3_ADDRESS_DEFAULT 0x00000000
/***************************************************************************
*STB_BOOT_ADDR3 - Lower 32-bit of HIF's STB Boot Continuation Address 3 Register
***************************************************************************/
/* HIF_CONTINUATION :: STB_BOOT_ADDR3 :: ADDRESS [31:00] */
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR3_ADDRESS_MASK 0xffffffff
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR3_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_STB_BOOT_ADDR3_ADDRESS_DEFAULT 0xffff0000
/***************************************************************************
*WEB_BOOT_HI_ADDR0 - Higher 8-bit of HIF's WEB Boot Continuation Address 0 Register
***************************************************************************/
/* HIF_CONTINUATION :: WEB_BOOT_HI_ADDR0 :: reserved0 [31:08] */
#define BCHP_HIF_CONTINUATION_WEB_BOOT_HI_ADDR0_reserved0_MASK 0xffffff00
#define BCHP_HIF_CONTINUATION_WEB_BOOT_HI_ADDR0_reserved0_SHIFT 8
/* HIF_CONTINUATION :: WEB_BOOT_HI_ADDR0 :: ADDRESS [07:00] */
#define BCHP_HIF_CONTINUATION_WEB_BOOT_HI_ADDR0_ADDRESS_MASK 0x000000ff
#define BCHP_HIF_CONTINUATION_WEB_BOOT_HI_ADDR0_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_WEB_BOOT_HI_ADDR0_ADDRESS_DEFAULT 0x00000000
/***************************************************************************
*WEB_BOOT_ADDR0 - Lower 32-bit of HIF's WEB Boot Continuation Address 0 Register
***************************************************************************/
/* HIF_CONTINUATION :: WEB_BOOT_ADDR0 :: ADDRESS [31:00] */
#define BCHP_HIF_CONTINUATION_WEB_BOOT_ADDR0_ADDRESS_MASK 0xffffffff
#define BCHP_HIF_CONTINUATION_WEB_BOOT_ADDR0_ADDRESS_SHIFT 0
#define BCHP_HIF_CONTINUATION_WEB_BOOT_ADDR0_ADDRESS_DEFAULT 0xffff0000
#endif /* #ifndef BCHP_HIF_CONTINUATION_H__ */
/* End of File */