| * Rockchip SPDIF transceiver |
| |
| The S/PDIF audio block is a stereo transceiver that allows the |
| processor to receive and transmit digital audio via an coaxial cable or |
| a fibre cable. |
| |
| Required properties: |
| |
| - compatible: should be one of the following: |
| - "rockchip,rk3288-spdif", "rockchip,rk3188-spdif" or |
| "rockchip,rk3066-spdif" |
| - reg: physical base address of the controller and length of memory mapped |
| region. |
| - interrupts: should contain the SPDIF interrupt. |
| - dmas: DMA specifiers for tx dma. See the DMA client binding, |
| Documentation/devicetree/bindings/dma/dma.txt |
| - dma-names: should be "tx" |
| - clocks: a list of phandle + clock-specifier pairs, one for each entry |
| in clock-names. |
| - clock-names: should contain following: |
| - "hclk": clock for SPDIF controller |
| - "mclk" : clock for SPDIF bus |
| |
| Required properties on RK3288: |
| - rockchip,grf: the phandle of the syscon node for the general register |
| file (GRF) |
| |
| Example for the rk3188 SPDIF controller: |
| |
| spdif: spdif@0x1011e000 { |
| compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif"; |
| reg = <0x1011e000 0x2000>; |
| interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
| dmas = <&dmac1_s 8>; |
| dma-names = "tx"; |
| clock-names = "hclk", "mclk"; |
| clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>; |
| status = "disabled"; |
| #sound-dai-cells = <0>; |
| }; |