| * Renesas R-Car generation 2 USB PHY |
| |
| This file provides information on what the device node for the R-Car generation |
| 2 USB PHY contains. |
| |
| Required properties: |
| - compatible: "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC. |
| "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC. |
| "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC. |
| - reg: offset and length of the register block. |
| - #address-cells: number of address cells for the USB channel subnodes, must |
| be <1>. |
| - #size-cells: number of size cells for the USB channel subnodes, must be <0>. |
| - clocks: clock phandle and specifier pair. |
| - clock-names: string, clock input name, must be "usbhs". |
| |
| The USB PHY device tree node should have the subnodes corresponding to the USB |
| channels. These subnodes must contain the following properties: |
| - reg: the USB controller selector; see the table below for the values. |
| - #phy-cells: see phy-bindings.txt in the same directory, must be <1>. |
| |
| The phandle's argument in the PHY specifier is the USB controller selector for |
| the USB channel; see the selector meanings below: |
| |
| +-----------+---------------+---------------+ |
| |\ Selector | | | |
| + --------- + 0 | 1 | |
| | Channel \| | | |
| +-----------+---------------+---------------+ |
| | 0 | PCI EHCI/OHCI | HS-USB | |
| | 2 | PCI EHCI/OHCI | xHCI | |
| +-----------+---------------+---------------+ |
| |
| Example (Lager board): |
| |
| usb-phy@e6590100 { |
| compatible = "renesas,usb-phy-r8a7790"; |
| reg = <0 0xe6590100 0 0x100>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; |
| clock-names = "usbhs"; |
| |
| usb-channel@0 { |
| reg = <0>; |
| #phy-cells = <1>; |
| }; |
| usb-channel@2 { |
| reg = <2>; |
| #phy-cells = <1>; |
| }; |
| }; |