| #ifndef __CONFIG_H |
| #define __CONFIG_H |
| |
| #define CFG_I2C_EEPROM_ADDR 0x50 |
| #define NOR_FLASH_SIZE 16 * 1024 * 1024 |
| |
| //int c2000_eth_board_init(void); |
| |
| #define EXP_CS0_BASE_VAL 0x0 |
| #define EXP_CS0_SEG_SIZE_VAL 0x7FFF |
| #define EXP_CS0_SEG_END_VAL (EXP_CS0_BASE_VAL + EXP_CS0_SEG_SIZE_VAL) |
| |
| #define EXP_CS1_BASE_VAL (EXP_CS0_SEG_END_VAL + 1) |
| #define EXP_CS1_SEG_SIZE_VAL 0xFF |
| #define EXP_CS1_SEG_END_VAL (EXP_CS1_BASE_VAL + EXP_CS1_SEG_SIZE_VAL) |
| |
| #define EXP_CS2_BASE_VAL (EXP_CS1_SEG_END_VAL + 1) |
| #define EXP_CS2_SEG_SIZE_VAL 0xFF |
| #define EXP_CS2_SEG_END_VAL (EXP_CS2_BASE_VAL + EXP_CS2_SEG_SIZE_VAL) |
| |
| #define EXP_CS3_BASE_VAL (EXP_CS2_SEG_END_VAL + 1) |
| #define EXP_CS3_SEG_SIZE_VAL 0xFF |
| #define EXP_CS3_SEG_END_VAL (EXP_CS3_BASE_VAL + EXP_CS3_SEG_SIZE_VAL) |
| |
| #define EXP_CS4_BASE_VAL (EXP_CS3_SEG_END_VAL + 1) |
| #define EXP_CS4_SEG_SIZE_VAL 0xFF |
| #define EXP_CS4_SEG_END_VAL (EXP_CS4_BASE_VAL + EXP_CS4_SEG_SIZE_VAL) |
| |
| #define SHIFT_4K_MUL 12 |
| |
| #define COMCERTO_EXP_CS4_BASE_ADDR (COMCERTO_AXI_EXP_BASE + (EXP_CS4_BASE_VAL << SHIFT_4K_MUL)) |
| |
| //In case MLC NAND is used on the Asic Board, comment this out |
| #define CONFIG_NAND_TYPE_SLC |
| |
| #if defined (CONFIG_NAND_TYPE_SLC) |
| #define COMCERTO_NAND_FLASH_SIZE (512UL * 1024UL * 1024UL) |
| #else |
| #define COMCERTO_NAND_FLASH_SIZE (2UL * 1024UL * 1024UL * 1024UL) |
| #endif |
| |
| #endif /* __CONFIG_H */ |
| |
