Barebox changes to support SpaceCast EVT boards

Now the SpaceCast EVT board is reworked to set the PHY
address to 1 instead of the default 0, the spacecast
board setting also needs to be changed.

Change-Id: If6700315f5ac81bbf4b80c36563e6b0702d3a803
diff --git a/arch/arm/boards/optimus/ddr.c b/arch/arm/boards/optimus/ddr.c
index 1b13e42..b8552c2 100644
--- a/arch/arm/boards/optimus/ddr.c
+++ b/arch/arm/boards/optimus/ddr.c
@@ -186,39 +186,6 @@
 
 static struct ddr_config bad_board_id_ddr_config = {0, 0, 0, "Unknown"};
 
-/* This variable is for debugging purposes. A developer can get its address
- * with "grep optimus_board_id System.map" and then examine it later with "md
- * 0x<address>" from barebox. */
-int optimus_board_id = 0x9999999;
-
-static int get_board_id(void) {
-	int board_id;
-	/* We determine the type of board by reading GPIO pins 57, 56 and 55
-	 * The bit patterns are defined as follows:
-	 * Optimus=000
-	 * Sideswipe=001
-	 * SpaceCast=010
-	*/
-
-	/* We usually set up GPIO pins in c2000_device_init(), but the latter
-	 * runs only after this function. */
-
-	/* GPIO[55-57] and CORESIGHT_D[11-13] are muxed on the same pins. Set
-	 * pin Select Register to select GPIO[55-57].  Pin Output Register is 0
-	 * by default. */
-	writel(readl(COMCERTO_GPIO_63_32_PIN_SELECT_REG) | 7<<(55-32), COMCERTO_GPIO_63_32_PIN_SELECT_REG);
-
-	/* Set GPIO[55-57] to input */
-	writel(readl(COMCERTO_GPIO_63_32_OE_REG) | 7<<(55-32), COMCERTO_GPIO_63_32_OE_REG);
-
-	/* Read 3 bit board id */
-	board_id = (readl(COMCERTO_GPIO_63_32_INPUT_REG) >> (55-32)) & 7;
-
-	optimus_board_id = board_id | 0xabcd0000;
-
-	return board_id;
-}
-
 const char *get_ddr_config_description(void) {
 	return get_ddr_config().description;
 }
diff --git a/arch/arm/boards/optimus/env_spacecast/bin/nfsboot b/arch/arm/boards/optimus/env_spacecast/bin/nfsboot
index b8da7f1..2d8f15f 100644
--- a/arch/arm/boards/optimus/env_spacecast/bin/nfsboot
+++ b/arch/arm/boards/optimus/env_spacecast/bin/nfsboot
@@ -5,8 +5,8 @@
 mtdparts="${nor_device}:${nor_parts}"
 bootargs="${bootargs} mtdparts=${mtdparts}"
 bootargs="${bootargs} mac_addr=${eth0.ethaddr},${eth1.ethaddr},${eth2.ethaddr}"
-bootargs="${bootargs} root=${eth0.serverip}:/mr"
-bootargs="${bootargs} ip=${eth0.ipaddr}::${eth0.gateway}::spacecast:lan0:off"
+bootargs="${bootargs} root=${eth1.serverip}:/mr"
+bootargs="${bootargs} ip=${eth1.ipaddr}::${eth1.gateway}::spacecast:lan0:off"
 
 tftp gfsc100.img
 bootm gfsc100.img
diff --git a/arch/arm/boards/optimus/env_spacecast/config b/arch/arm/boards/optimus/env_spacecast/config
index b98a9e6..76d445b 100644
--- a/arch/arm/boards/optimus/env_spacecast/config
+++ b/arch/arm/boards/optimus/env_spacecast/config
@@ -1,5 +1,5 @@
 #!/bin/sh
-ethact eth0
+ethact eth1
 
 if [ -f /env/ethaddrs ]; then
 	. /env/ethaddrs
diff --git a/arch/arm/boards/optimus/optimus.c b/arch/arm/boards/optimus/optimus.c
index ce2c480..54a67b7 100644
--- a/arch/arm/boards/optimus/optimus.c
+++ b/arch/arm/boards/optimus/optimus.c
@@ -53,6 +53,11 @@
 
 #define PHY_DEVICE      "phy0"
 
+#define OPTIMUS_BOARD_ID		0
+#define SIDESWIPE_BOARD_ID		1
+#define SPACECAST_BOARD_ID		2
+#define SPACECAST_EMAC1_PHY_ADDR	1
+
 #ifdef CONFIG_SPI
 //Legacy spi
 
@@ -107,6 +112,7 @@
 struct c2000_eth_platform_data eth0_pdata = {
 	.gemac_port = 0,
 	.mac_addr = 0,
+	.phy_addr = EMAC0_PHY_ADDR,
 };
 
 struct device_d c2000_eth0 = {
@@ -120,6 +126,7 @@
 struct c2000_eth_platform_data eth1_pdata = {
 	.gemac_port = 1,
 	.mac_addr = 0,
+	.phy_addr = EMAC1_PHY_ADDR,
 };
 
 struct device_d c2000_eth1 = {
@@ -133,6 +140,7 @@
 struct c2000_eth_platform_data eth2_pdata = {
 	.gemac_port = 2,
 	.mac_addr = 0,
+	.phy_addr = 0,
 };
 
 struct device_d c2000_eth2 = {
@@ -209,6 +217,40 @@
 	.size     = SPI_FLASH_SIZE,
 };
 
+/* This variable is for debugging purposes. A developer can get its address
+ * with "grep optimus_board_id System.map" and then examine it later with "md
+ * 0x<address>" from barebox. */
+int optimus_board_id = 0x9999999;
+
+int get_board_id(void) {
+	int board_id;
+	/* We determine the type of board by reading GPIO pins 57, 56 and 55
+	 * The bit patterns are defined as follows:
+	 * Optimus=000
+	 * Sideswipe=001
+	 * SpaceCast=010
+	*/
+
+	/* We usually set up GPIO pins in c2000_device_init(), but the latter
+	 * runs only after this function. */
+
+	/* GPIO[55-57] and CORESIGHT_D[11-13] are muxed on the same pins. Set
+	 * pin Select Register to select GPIO[55-57].  Pin Output Register is 0
+	 * by default. */
+	writel(readl(COMCERTO_GPIO_63_32_PIN_SELECT_REG) | 7<<(55-32), COMCERTO_GPIO_63_32_PIN_SELECT_REG);
+
+	/* Set GPIO[55-57] to input */
+	writel(readl(COMCERTO_GPIO_63_32_OE_REG) | 7<<(55-32), COMCERTO_GPIO_63_32_OE_REG);
+
+	/* Read 3 bit board id */
+	board_id = (readl(COMCERTO_GPIO_63_32_INPUT_REG) >> (55-32)) & 7;
+
+	optimus_board_id = board_id | 0xabcd0000;
+
+	return board_id;
+}
+EXPORT_SYMBOL(get_board_id)
+
 static int c2000_device_init(void)
 {
 #ifdef	CONFIG_COMCERTO_BOOTLOADER
@@ -233,6 +275,12 @@
 #endif
 
 #if defined(CONFIG_NET_COMCERTO_2000)
+	if (get_board_id() == SPACECAST_BOARD_ID) {
+		/* In SpaceCast GEMAC1 is connected to PHY address 0 */
+		struct c2000_eth_platform_data *pdata =
+						c2000_eth1.platform_data;
+		pdata->phy_addr = SPACECAST_EMAC1_PHY_ADDR;
+	}
 	register_device(&c2000_eth0);
 	register_device(&c2000_eth1);
 	register_device(&c2000_eth2);
@@ -380,19 +428,20 @@
         //eth0 port is chosen as criteria for bringingup out of reset because
         //all MDIO access can happen through EMAC0 and without bringing eth0 first
         //no Switch/PHY configuration can happen and no point in removing reset without eth0
-	if(gemac_port == 0)
-	{
+	if (get_board_id() != SPACECAST_BOARD_ID) {
+		if(gemac_port == 0)
+		{
+				//AR8327 Switch init
+				athrs17_init(mdev);
 
-		//AR8327 Switch init
-		athrs17_init(mdev);
-
-		//AR8327 WAN PHY4 init
-		athrs17_phy_setup(mdev,EMAC0_PHY_ADDR);
-	}
-	else
-	{
-		//AR8327 LAN PHYs init
-		athrs17_phy_setup(mdev,EMAC1_PHY_ADDR);
+				//AR8327 WAN PHY4 init
+				athrs17_phy_setup(mdev,EMAC0_PHY_ADDR);
+		}
+		else
+		{
+			//AR8327 LAN PHYs init
+			athrs17_phy_setup(mdev,EMAC1_PHY_ADDR);
+		}
 	}
 }
 
diff --git a/drivers/net/comcerto/c2000_eth.c b/drivers/net/comcerto/c2000_eth.c
index cbd046e..c64d3c5 100644
--- a/drivers/net/comcerto/c2000_eth.c
+++ b/drivers/net/comcerto/c2000_eth.c
@@ -50,7 +50,6 @@
 
 		/* phy iface */
 		.phy_reg_index = EMAC_PORT_0,
-		.phy_address = EMAC0_PHY_ADDR,
 	},
 	/* PORT_1 configuration */
 	{
@@ -62,7 +61,6 @@
 
 		/* phy iface */
 		.phy_reg_index = EMAC_PORT_0,
-		.phy_address = EMAC1_PHY_ADDR,
 	},
 
 	/* PORT_2 configuration */
@@ -75,7 +73,6 @@
 
 		/* phy iface */
 		.phy_reg_index = EMAC_PORT_0,
-		.phy_address = 0,
 	},
 };
 
@@ -537,7 +534,7 @@
 	priv->phyregisters = (void *)gem_info[gem_info[priv->gemac_port].phy_reg_index].gemac_base;
 	priv->miidev.read = c2000_phy_read;
 	priv->miidev.write = c2000_phy_write;
-	priv->miidev.address = gem_info[priv->gemac_port].phy_address;
+	priv->miidev.address = priv->einfo->phy_addr;
 	priv->miidev.flags = 0;
 	priv->miidev.edev = edev;
 
diff --git a/include/c2000_eth_pdata.h b/include/c2000_eth_pdata.h
index e4598bc..91e8f11 100644
--- a/include/c2000_eth_pdata.h
+++ b/include/c2000_eth_pdata.h
@@ -5,6 +5,7 @@
 struct c2000_eth_platform_data {
 	int gemac_port;
 	u8 mac_addr[6];
+	u32 phy_addr;
 };
 
 #endif