uloader change to support SpaceCast board ID 010
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Change-Id: Ifd6a92bbe9103e3a97496420af4b0ffe2093065d
diff --git a/arch/arm/boards/optimus/ddr.c b/arch/arm/boards/optimus/ddr.c
index 1d37545..1b13e42 100644
--- a/arch/arm/boards/optimus/ddr.c
+++ b/arch/arm/boards/optimus/ddr.c
@@ -5,6 +5,8 @@
#include <mach/ddr.h>
#include <mach/gpio.h>
+/* This array is called optimus_ddrc_cfg for historic reasons. */
+/* It applies to both Optimus and SpaceCast. */
static struct ddr_reg_val optimus_ddrc_cfg[] = {
{DDRC_CTL_00_REG, 0x20410600LL},
{DDRC_CTL_02_REG, 0x00000006LL},
@@ -76,6 +78,8 @@
{0, 0}
};
+/* This array is called optimus_ddr_phy_cfg for historic reasons. */
+/* It applies to both Optimus and SpaceCast. */
static struct ddr_reg_val optimus_ddr_phy_cfg[] = {
{DDR_PHY_CTL_00_REG, 0x000F1023LL},
{DDR_PHY_CTL_01_REG, 0x18201010LL},
@@ -177,6 +181,7 @@
{optimus_ddr_phy_cfg, optimus_ddrc_cfg, SZ_1G, "Optimus"},
/* Nanya NT5CB128M16FP-DI, 533MHz, 32bit, NoECC */
{sideswipe_ddr_phy_cfg, sideswipe_ddrc_cfg, SZ_512M, "Sideswipe"},
+ {optimus_ddr_phy_cfg, optimus_ddrc_cfg, SZ_1G, "SpaceCast"},
};
static struct ddr_config bad_board_id_ddr_config = {0, 0, 0, "Unknown"};
@@ -192,6 +197,7 @@
* The bit patterns are defined as follows:
* Optimus=000
* Sideswipe=001
+ * SpaceCast=010
*/
/* We usually set up GPIO pins in c2000_device_init(), but the latter
