| /* |
| * Copyright (c) 2013 Qualcomm Atheros, Inc. |
| * |
| * Permission to use, copy, modify, and/or distribute this software for any |
| * purpose with or without fee is hereby granted, provided that the above |
| * copyright notice and this permission notice appear in all copies. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| */ |
| |
| #include <common.h> |
| #include <command.h> |
| #include <asm/mipsregs.h> |
| #include <asm/addrspace.h> |
| #include <config.h> |
| #include <version.h> |
| #include <atheros.h> |
| |
| extern int ath_ddr_initial_config(uint32_t refresh); |
| extern int ath_ddr_find_size(void); |
| |
| #ifdef COMPRESSED_UBOOT |
| # define prmsg(...) |
| # define args char *s |
| # define board_str(a) do { \ |
| char ver[] = "0"; \ |
| uint32_t revid; \ |
| if(((revid=ath_reg_rd(RST_REVISION_ID_ADDRESS))&0xff0)==0x140) \ |
| strcpy(s, a " - Honey Bee 1."); \ |
| else \ |
| strcpy(s, a " - Honey Bee 2."); \ |
| ver[0] += (revid & 0xf) ; \ |
| strcat(s, ver); \ |
| } while (0) |
| #else |
| # define prmsg printf |
| # define args void |
| # define board_str(a) \ |
| uint32_t revid; \ |
| if(((revid=ath_reg_rd(RST_REVISION_ID_ADDRESS))&0xff0)==0x140) \ |
| printf(a " - Honey Bee 1.%d", revid & 0xf); \ |
| else \ |
| printf(a " - Honey Bee 2.%d", revid & 0xf); |
| #endif |
| |
| void |
| ath_usb_initial_config(void) |
| { |
| #define unset(a) (~(a)) |
| |
| if (ath_reg_rd(RST_BOOTSTRAP_ADDRESS) & RST_BOOTSTRAP_TESTROM_ENABLE_MASK) { |
| |
| ath_reg_rmw_set(RST_RESET_ADDRESS, RST_RESET_USB_HOST_RESET_SET(1)); |
| udelay(1000); |
| ath_reg_rmw_set(RST_RESET_ADDRESS, RST_RESET_USB_PHY_RESET_SET(1)); |
| udelay(1000); |
| |
| ath_reg_wr(PHY_CTRL5_ADDRESS, PHY_CTRL5_RESET_1); |
| udelay(1000); |
| |
| ath_reg_rmw_set(RST_RESET_ADDRESS, RST_RESET_USB_PHY_PLL_PWD_EXT_SET(1)); |
| udelay(1000); |
| ath_reg_rmw_set(RST_RESET_ADDRESS, RST_RESET_USB_PHY_ARESET_SET(1)); |
| udelay(1000); |
| |
| ath_reg_rmw_clear(RST_CLKGAT_EN_ADDRESS, RST_CLKGAT_EN_USB1_SET(1)); |
| |
| return; |
| } |
| |
| ath_reg_wr_nf(SWITCH_CLOCK_SPARE_ADDRESS, |
| ath_reg_rd(SWITCH_CLOCK_SPARE_ADDRESS) | |
| SWITCH_CLOCK_SPARE_USB_REFCLK_FREQ_SEL_SET(2)); |
| udelay(1000); |
| |
| ath_reg_rmw_set(RST_RESET_ADDRESS, |
| RST_RESET_USB_PHY_SUSPEND_OVERRIDE_SET(1)); |
| udelay(1000); |
| ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_ARESET_SET(1)); |
| udelay(1000); |
| ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_RESET_SET(1)); |
| udelay(1000); |
| ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_HOST_RESET_SET(1)); |
| udelay(1000); |
| |
| ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_PLL_PWD_EXT_SET(1)); |
| udelay(10); |
| } |
| |
| #define GFMN_GPIO_RESET (1 << 13) |
| #define GFMN_GPIO_LEDB (1 << 11) |
| #define GFMN_GPIO_LEDR (1 << 16) |
| |
| void ath_gpio_config(void) |
| { |
| /* GPIO4 configured in cpu/mips/start.S */ |
| |
| ath_reg_rmw_set(GPIO_OE_ADDRESS, GFMN_GPIO_RESET); |
| |
| ath_reg_rmw_set(GPIO_OE_ADDRESS, GFMN_GPIO_LEDB | GFMN_GPIO_LEDR); |
| ath_reg_rmw_clear(GPIO_OE_ADDRESS, GFMN_GPIO_LEDB); |
| ath_reg_rmw_set(GPIO_OUT_ADDRESS, GFMN_GPIO_LEDR); |
| } |
| |
| int |
| ath_mem_config(void) |
| { |
| unsigned int type, reg32, *tap; |
| extern uint32_t *ath_ddr_tap_cal(void); |
| |
| #if !defined(CONFIG_ATH_EMULATION) |
| type = ath_ddr_initial_config(CFG_DDR_REFRESH_VAL); |
| |
| tap = ath_ddr_tap_cal(); |
| prmsg("tap = 0x%p\n", tap); |
| |
| tap = (uint32_t *)0xbd001f10; |
| prmsg("Tap (low, high) = (0x%x, 0x%x)\n", tap[0], tap[1]); |
| |
| tap = (uint32_t *)TAP_CONTROL_0_ADDRESS; |
| prmsg("Tap values = (0x%x, 0x%x, 0x%x, 0x%x)\n", |
| tap[0], tap[2], tap[2], tap[3]); |
| |
| /* Take WMAC out of reset */ |
| reg32 = ath_reg_rd(RST_RESET_ADDRESS); |
| reg32 = reg32 & ~RST_RESET_RTC_RESET_SET(1); |
| ath_reg_wr_nf(RST_RESET_ADDRESS, reg32); |
| |
| ath_usb_initial_config(); |
| |
| ath_gpio_config(); |
| #endif /* !defined(CONFIG_ATH_EMULATION) */ |
| |
| return ath_ddr_find_size(); |
| } |
| |
| long int initdram(int board_type) |
| { |
| return (ath_mem_config()); |
| } |
| |
| int checkboard(args) |
| { |
| board_str(CONFIG_BOARD_NAME); |
| return 0; |
| } |