# make.rules - common build rules
#
# modification history
# --------------------
# 04-15-02,mj	created
#
########################################################################

ifeq ($(TARGET),)
TARGET	= $(notdir $(shell $(CD)))
endif
default : $(TARGET).o

# Set searching directories for target and dependencies
vpath %.o $(OBJDIR)

# Include DEPENDENCIES file if it exists
ifeq ($(shell if [ -a $(DEPENDENCIES) ]; then $(ECHO) 1; fi),1)
include $(DEPENDENCIES)
endif

# Accumulate source files specified in each directory makefile
COBJECTS  = $(CSOURCES:.c=.o)
AOBJECTS  = $(ASOURCES:.s=.o)
ifeq ($(OBJECTS),)
OBJECTS  = $(COBJECTS) $(AOBJECTS)
endif

$(TARGET).o : $(OBJECTS) deps
	@ $(ECHO) 'Building $@'
	$(LD) $(LDFLAGS) -Map $(OBJDIR)/$(TARGET).map -o $(OBJDIR)/$(TARGET).o $(addprefix $(OBJDIR)/,$(notdir $(OBJECTS)))

$(OBJECTS): %.o: %.c
.c.o :
	@if ! [ -a $(OBJDIR) ]; then mkdir $(OBJDIR); fi
	$(CC) $(CFLAGS) $(EXTRA_DEFINE) $(EXTRA_INCLUDE) $(ADDED_CFLAGS) -c $< -o $(OBJDIR)/$(notdir $@)

deps : $(CSOURCES)
	@ $(ECHO) '##' > $(DEPENDENCIES)
	@ $(ECHO) '## This file is generated by "make"!' >> $(DEPENDENCIES)
	@ $(ECHO) '##' >> $(DEPENDENCIES)
	@for i in $^ ; do \
		$(ECHO) "  $$i"; \
		$(CC) -M -MG $(CFLAGS) $$i >> $(DEPENDENCIES);  \
		$(ECHO) '##' >> $(DEPENDENCIES);	\
	done

.PHONY: clean
clean:
	cd $(OBJDIR); $(RM) *.o
	cd $(OBJDIR); $(RM) *.map
	$(RM) $(DEPENDENCIES)

FORCE :

# end of file