# make.rules - common build rules
#
# modification history
# --------------------
# 04-15-02,mj	created
#
########################################################################
ifeq ($(TARGET),)
TARGET	= $(notdir $(subst \,/,$(shell cd)))
endif
default : $(TARGET).o

# Set searching directories for target and dependencies
vpath %.o    $(OBJDIR)

# Include RULES file if it exists
ifeq ($(shell if exist $(DEPENDENCIES) $(ECHO) 1),1)
include $(DEPENDENCIES)
endif

# Accumulate source files specified in each directory makefile
COBJECTS  	= $(CSOURCES:.c=.o)
AOBJECTS  	= $(ASOURCES:.s=.o)
ifeq ($(OBJECTS),)
OBJECTS  	= $(COBJECTS) $(AOBJECTS)
endif

$(TARGET).o : $(OBJECTS) deps
	@ $(ECHO) 'Building $@'
	$(LD) $(LDFLAGS) -Map $(OBJDIR)/$(TARGET).map -o $(OBJDIR)/$(TARGET).o $(addprefix $(OBJDIR)/,$(notdir $(OBJECTS)))

$(OBJECTS) : %.o : %.c
.c.o :
	@if not exist $(OBJDIR) mkdir $(OBJDIR)
	$(CC) $(CFLAGS) $(EXTRA_DEFINE) $(EXTRA_INCLUDE) $(ADDED_CFLAGS) -c $< -o $(OBJDIR)/$(notdir $@)

deps : $(CSOURCES)
	@$(ECHO) '##' > $(DEPENDENCIES)
	@$(ECHO) '## This file is generated by "make"!' >> $(DEPENDENCIES)
	@$(ECHO) '##' >> $(DEPENDENCIES)
	@for %x in ($^) do \
	    @$(ECHO) '  %x' & \
	     $(CC) -M -MG $(CFLAGS) %x >> $(DEPENDENCIES) & \
	     @$(ECHO) '##' >> $(DEPENDENCIES)

.PHONY: clean
clean:
	$(RM) $(DEPENDENCIES)
	- ($(CD) $(OBJDIR)) && $(RM) *.o
	- ($(CD) $(OBJDIR)) && $(RM) *.map

FORCE :

# end of file